]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
msm_serial: Read bit rate register value from DT
authorRobert Marko <robert.marko@sartura.hr>
Mon, 6 Jul 2020 08:37:55 +0000 (10:37 +0200)
committerTom Rini <trini@konsulko.com>
Wed, 29 Jul 2020 12:43:40 +0000 (08:43 -0400)
IPQ40xx and currently supported Snapdragon boards don't use the same one
so enable reading it from DT, if no DT property is found default value
is the same as the previous define.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
doc/device-tree-bindings/serial/msm-serial.txt
drivers/serial/serial_msm.c

index 48b8428aca80ed9dd5851d83164402ed7205568b..dca995798a905fe2bd07b19bd39b60f57eff6d17 100644 (file)
@@ -4,3 +4,7 @@ Required properties:
 - compatible: must be "qcom,msm-uartdm-v1.4"
 - reg: start address and size of the registers
 - clock: interface clock (must accept baudrate as a frequency)
+
+Optional properties:
+- bit-rate: Data Mover bit rate register value
+                       (If not defined then 0xCC is used as default)
index a1c9abcfbba267c3a4b4761498c935dfe4694cd4..c8946c3aae8df5471c28e3f3d3d41b0c435cad9b 100644 (file)
@@ -61,6 +61,7 @@ struct msm_serial_data {
        phys_addr_t base;
        unsigned chars_cnt; /* number of buffered chars */
        uint32_t chars_buf; /* buffered chars */
+       uint32_t clk_bit_rate; /* data mover mode bit rate register value */
 };
 
 static int msm_serial_fetch(struct udevice *dev)
@@ -190,7 +191,7 @@ static int msm_uart_clk_init(struct udevice *dev)
 
 static void uart_dm_init(struct msm_serial_data *priv)
 {
-       writel(UART_DM_CLK_RX_TX_BIT_RATE, priv->base + UARTDM_CSR);
+       writel(priv->clk_bit_rate, priv->base + UARTDM_CSR);
        writel(0x0, priv->base + UARTDM_MR1);
        writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2);
        writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR);
@@ -223,6 +224,9 @@ static int msm_serial_ofdata_to_platdata(struct udevice *dev)
        if (priv->base == FDT_ADDR_T_NONE)
                return -EINVAL;
 
+       priv->clk_bit_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), 
+                                                       "bit-rate", UART_DM_CLK_RX_TX_BIT_RATE);
+
        return 0;
 }