imx: define ARCH_MXC for i.MX8/8M/7ULP

Without this definition, fsl_esdhc will access reserved registers
on i.MX chips, so define ARCH_MXC to fix it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

diff --git a/arch/arm/include/asm/arch-imx8/imx-regs.h b/arch/arm/include/asm/arch-imx8/imx-regs.h
index af0fb5154b61a7293890f6239aafdd0564b3e42f..6333ff4686fe68fee2be1b2bc2ad0a0f77f54191 100644 (file)
--- a/arch/arm/include/asm/arch-imx8/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8/imx-regs.h
@@ -6,6 +6,8 @@
 #ifndef __ASM_ARCH_IMX8_REGS_H__
 #define __ASM_ARCH_IMX8_REGS_H__
 
+#define ARCH_MXC
+
 #define LPUART_BASE            0x5A060000
 
 #define GPT1_BASE_ADDR         0x5D140000

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 3facd5450c01b80f10cc914f336a9052f7684c86..68666a535b9cb93afbfef2dec6c6ddc9fcda2ff4 100644 (file)
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -6,6 +6,8 @@
 #ifndef __ASM_ARCH_IMX8M_REGS_H__
 #define __ASM_ARCH_IMX8M_REGS_H__
 
+#define ARCH_MXC
+
 #include <asm/mach-imx/regs-lcdif.h>
 
 #define ROM_VERSION_A0         0x800

diff --git a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h
index bf9f39aca23dcc0a1a42ccf6f20e3e8236cbc320..63b02de0878b25e31a66082c353ca6f5374f8e3b 100644 (file)
--- a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h
@@ -8,6 +8,8 @@
 
 #include <linux/sizes.h>
 
+#define ARCH_MXC
+
 #define CAAM_SEC_SRAM_BASE      (0x26000000)
 #define CAAM_SEC_SRAM_SIZE      (SZ_32K)
 #define CAAM_SEC_SRAM_END       (CAAM_SEC_SRAM_BASE + CAAM_SEC_SRAM_SIZE - 1)