arm: socfpga: misc: Move bridge command to misc common

Move bridge command to misc common driver, in preparation to used by
other platforms.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h
index 197f09a57cb34c6d97dc72ec232400bf7309c76f..7fe77ac8d81b793a798e37494cae175bab30c976 100644 (file)
--- a/arch/arm/mach-socfpga/include/mach/misc.h
+++ b/arch/arm/mach-socfpga/include/mach/misc.h
@@ -27,4 +27,6 @@ unsigned int shared_uart_com_port(const void *blob);
 unsigned int uart_com_port(const void *blob);
 #endif
 
+void do_bridge_reset(int enable);
+
 #endif /* _MISC_H_ */

diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index fca86507f18beea0cc28ba4ca451a6bf11b1639c..68eeb292ce7375cd1a49942a593140aea68fa920 100644 (file)
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -204,3 +204,35 @@ int socfpga_eth_reset_common(void (*resetfn)(const u8 of_reset_id,
        return 0;
 }
 #endif
+
+#ifndef CONFIG_SPL_BUILD
+static int do_bridge(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+       if (argc != 2)
+               return CMD_RET_USAGE;
+
+       argv++;
+
+       switch (*argv[0]) {
+       case 'e':       /* Enable */
+               do_bridge_reset(1);
+               break;
+       case 'd':       /* Disable */
+               do_bridge_reset(0);
+               break;
+       default:
+               return CMD_RET_USAGE;
+       }
+
+       return 0;
+}
+
+U_BOOT_CMD(
+       bridge, 2, 1, do_bridge,
+       "SoCFPGA HPS FPGA bridge control",
+       "enable  - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"
+       "bridge disable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"
+       ""
+);
+
+#endif

diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index 434373404e36d5e316488fac64905b87df66b90f..848551c73f8ca64c5701aa0053d4777e2678188a 100644 (file)
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -259,40 +259,20 @@ static void socfpga_sdram_apply_static_cfg(void)
        : : "r"(val), "r"(&sdr_ctrl->static_cfg) : "memory", "cc");
 }
 
-static int do_bridge(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+void do_bridge_reset(int enable)
 {
-       if (argc != 2)
-               return CMD_RET_USAGE;
-
-       argv++;
-
-       switch (*argv[0]) {
-       case 'e':       /* Enable */
+       if (enable) {
                writel(iswgrp_handoff[2], &sysmgr_regs->fpgaintfgrp_module);
                socfpga_sdram_apply_static_cfg();
                writel(iswgrp_handoff[3], &sdr_ctrl->fpgaport_rst);
                writel(iswgrp_handoff[0], &reset_manager_base->brg_mod_reset);
                writel(iswgrp_handoff[1], &nic301_regs->remap);
-               break;
-       case 'd':       /* Disable */
+       } else {
                writel(0, &sysmgr_regs->fpgaintfgrp_module);
                writel(0, &sdr_ctrl->fpgaport_rst);
                socfpga_sdram_apply_static_cfg();
                writel(0, &reset_manager_base->brg_mod_reset);
                writel(1, &nic301_regs->remap);
-               break;
-       default:
-               return CMD_RET_USAGE;
        }
-
-       return 0;
 }
-
-U_BOOT_CMD(
-       bridge, 2, 1, do_bridge,
-       "SoCFPGA HPS FPGA bridge control",
-       "enable  - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"
-       "bridge disable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"
-       ""
-);
 #endif