drivers: usb: fsl: Workaround for Erratum A004477

Add a delay of 1 microsecond before issuing soft reset to the
controller to let ongoing ULPI transaction complete.
This prevents corruption of ULPI Function Control Register which
eventually prevents phy clock from entering to low power mode

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 2d5ddf012b6b3a27c370e0bc3c65ad94c87e77d0..b368562a2451911182ce874c98bd540980996541 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -299,6 +299,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
        if (has_erratum_a007798())
                puts("Work-around for Erratum A007798 enabled\n");
 #endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A004477
+       if (has_erratum_a004477())
+               puts("Work-around for Erratum A004477 enabled\n");
+#endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447
        if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) ||
            (SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV))

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 69e05923f68c4e55db2d2c4429d33b44d1503e28..fecfe1b03cd34145ae142220c4b9a287523fb97a 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -163,6 +163,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_A004508
 #define CONFIG_SYS_FSL_ERRATUM_A007075
 #define CONFIG_SYS_FSL_ERRATUM_A006261
+#define CONFIG_SYS_FSL_ERRATUM_A004477
 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
 #define CONFIG_ESDHC_HC_BLK_ADDR
 
@@ -294,6 +295,7 @@
 #define CONFIG_FSL_SATA_ERRATUM_A001
 #define CONFIG_SYS_FSL_ERRATUM_A004508
 #define CONFIG_SYS_FSL_ERRATUM_A005125
+#define CONFIG_SYS_FSL_ERRATUM_A004477
 
 #elif defined(CONFIG_P1023)
 #define CONFIG_MAX_CPUS                        2
@@ -374,6 +376,7 @@
 #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM       2
 #define CONFIG_SYS_FSL_ERRATUM_A004508
 #define CONFIG_SYS_FSL_ERRATUM_A005125
+#define CONFIG_SYS_FSL_ERRATUM_A004477
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        1
 
 #elif defined(CONFIG_PPC_P2041) /* also supports P2040 */
@@ -591,6 +594,7 @@
 #define CONFIG_NAND_FSL_IFC
 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_A005125
+#define CONFIG_SYS_FSL_ERRATUM_A004477
 #define CONFIG_ESDHC_HC_BLK_ADDR
 
 #elif defined(CONFIG_BSC9132)
@@ -615,6 +619,7 @@
 #define CONFIG_SYS_FSL_PCIE_COMPAT     "fsl,qoriq-pcie-v2.2"
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 #define CONFIG_SYS_FSL_ERRATUM_A005434
+#define CONFIG_SYS_FSL_ERRATUM_A004477
 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
 #define CONFIG_ESDHC_HC_BLK_ADDR
@@ -723,6 +728,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_A006475
 #define CONFIG_SYS_FSL_ERRATUM_A006384
 #define CONFIG_SYS_FSL_ERRATUM_A007212
+#define CONFIG_SYS_FSL_ERRATUM_A004477
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0xfe000000
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 2dca5244be9c15b87116b9e880c06e69d7c41927..5fd618df87bb876df1cb38d21c73185ef2463ee8 100644 (file)
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -138,6 +138,16 @@ int ehci_hcd_init(int index, enum usb_init_type init,
        if (has_erratum_a007798())
                set_txfifothresh(ehci, TXFIFOTHRESH);
 
+       if (has_erratum_a004477()) {
+               /*
+                * When reset is issued while any ULPI transaction is ongoing
+                * then it may result to corruption of ULPI Function Control
+                * Register which eventually causes phy clock to enter low
+                * power mode which stops the clock. Thus delay is required
+                * before reset to let ongoing ULPI transaction complete.
+                */
+               udelay(1);
+       }
        return 0;
 }
 

diff --git a/include/fsl_usb.h b/include/fsl_usb.h
index 33d9f030960c27117e754ec49b51390e8ad2936a..8e3ddedfad1b71bf5ce0c90f4001734eb6e85891 100644 (file)
--- a/include/fsl_usb.h
+++ b/include/fsl_usb.h
@@ -209,6 +209,30 @@ static inline bool has_erratum_a005697(void)
        return false;
 }
 
+static inline bool has_erratum_a004477(void)
+{
+       u32 svr = get_svr();
+       u32 soc = SVR_SOC_VER(svr);
+
+       switch (soc) {
+       case SVR_P1010:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+       case SVR_P1022:
+       case SVR_9131:
+       case SVR_9132:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+       case SVR_P2020:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0) ||
+                       IS_SVR_REV(svr, 2, 1);
+       case SVR_B4860:
+       case SVR_B4420:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+       case SVR_P4080:
+               return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
+       }
+
+       return false;
+}
 #else
 static inline bool has_dual_phy(void)
 {
@@ -239,5 +263,10 @@ static inline bool has_erratum_a005697(void)
 {
        return false;
 }
+
+static inline bool has_erratum_a004477(void)
+{
+       return false;
+}
 #endif
 #endif /*_ASM_FSL_USB_H_ */