]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
net: fec_mxc: Drop CONFIG_FEC_XCV_TYPE
authorTom Rini <trini@konsulko.com>
Fri, 11 Mar 2022 14:12:10 +0000 (09:12 -0500)
committerTom Rini <trini@konsulko.com>
Fri, 18 Mar 2022 16:48:17 +0000 (12:48 -0400)
With all boards now using DM_ETH we determine the value for
CONFIG_FEC_XCV_TYPE at run time, except in the case of the default
fall-back.  Set the fallback directly now.

Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
47 files changed:
doc/README.fec_mxc
drivers/net/fec_mxc.c
include/configs/apalis-imx8x.h
include/configs/aristainetos2.h
include/configs/brppt2.h
include/configs/capricorn-common.h
include/configs/cgtqmx8.h
include/configs/cl-som-imx7.h
include/configs/cm_fx6.h
include/configs/dh_imx6.h
include/configs/imx6_logic.h
include/configs/imx8mm-cl-iot-gate.h
include/configs/imx8mm_beacon.h
include/configs/imx8mm_evk.h
include/configs/imx8mm_venice.h
include/configs/imx8mn_beacon.h
include/configs/imx8mn_var_som.h
include/configs/imx8mn_venice.h
include/configs/imx8mp_evk.h
include/configs/imx8mp_rsb3720.h
include/configs/imx8mq_evk.h
include/configs/imx8mq_phanbell.h
include/configs/imx8qm_mek.h
include/configs/imx8qm_rom7720.h
include/configs/imx8qxp_mek.h
include/configs/imx8ulp_evk.h
include/configs/kontron_pitx_imx8m.h
include/configs/liteboard.h
include/configs/m53menlo.h
include/configs/mx6sxsabreauto.h
include/configs/mx6sxsabresd.h
include/configs/mx6ul_14x14_evk.h
include/configs/mxs.h
include/configs/nitrogen6x.h
include/configs/npi_imx6ull.h
include/configs/o4-imx6ull-nano.h
include/configs/pico-imx6.h
include/configs/pico-imx6ul.h
include/configs/pico-imx8mq.h
include/configs/somlabs_visionsom_6ull.h
include/configs/tqma6_mba6.h
include/configs/tqma6_wru4.h
include/configs/verdin-imx8mm.h
include/configs/verdin-imx8mp.h
include/configs/vf610twr.h
include/configs/vining_2000.h
include/configs/xpress.h

index 9ca6ac2fb59d13253af6fdd742e3b36a508d0a39..d17dfb676f79758ea300cc298e5ac959019c132c 100644 (file)
@@ -7,11 +7,6 @@ CONFIG_FEC_MXC
 CONFIG_MII
        Must be defined if CONFIG_FEC_MXC is defined.
 
-CONFIG_FEC_XCV_TYPE
-       Defaults to MII100 for 100 Base-tx.
-       RGMII selects 1000 Base-tx reduced pin count interface.
-       RMII selects 100 Base-tx reduced pin count interface.
-
 CONFIG_FEC_MXC_SWAP_PACKET
        Forced on iff MX28.
        Swaps the bytes order of all words(4 byte units) in the packet.
index a26927582d2278daf7932ed3896e33f8c2da2d44..e8ebef09032aa0c065e7c3584ff92f106575a804 100644 (file)
@@ -54,10 +54,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #error "CONFIG_MII has to be defined!"
 #endif
 
-#ifndef CONFIG_FEC_XCV_TYPE
-#define CONFIG_FEC_XCV_TYPE MII100
-#endif
-
 /*
  * The i.MX28 operates with packets in big endian. We need to swap them before
  * sending and after receiving.
@@ -1269,9 +1265,9 @@ static int fecmxc_probe(struct udevice *dev)
                priv->xcv_type = RGMII;
                break;
        default:
-               priv->xcv_type = CONFIG_FEC_XCV_TYPE;
-               printf("Unsupported interface type %d defaulting to %d\n",
-                      priv->interface, priv->xcv_type);
+               priv->xcv_type = MII100;
+               printf("Unsupported interface type %d defaulting to MII100\n",
+                      priv->interface);
                break;
        }
 
index f43e166c908d1215e6aa368fee706e09da2a9417..71a80f38bbb056720cba4b2dab2d02da4c355bc0 100644 (file)
 #define CONFIG_FEC_ENET_DEV 0
 #define IMX_FEC_BASE                   0x5b040000
 #define CONFIG_FEC_MXC_PHYADDR          0x4
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define PHY_ANEG_TIMEOUT 20000
 
 #endif /* __APALIS_IMX8X_H */
index 96792028e0232e3d264b8f5669c432ff098d1091..fcf364be8df4555d7949bc08f2f4a81112debe8f 100644 (file)
@@ -21,8 +21,6 @@
 #define CONSOLE_DEV    "ttymxc0"
 #endif
 
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 /* Framebuffer */
 #define CONFIG_SYS_LDB_CLOCK   28341000
 
index 4f89f9d9ef95e9cfde245aa29ab2ef4c79d57bef..92f69ba9b0f5d2f198c112dc35b42ba0e7446d20 100644 (file)
@@ -87,7 +87,6 @@ BUR_COMMON_ENV \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* Ethernet */
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_FIXED_SPEED         _1000BASET
 
 /* USB Configs */
index c521dddab778d762a56fbff4c3baff5bfe4001eb..58d7a3a8ce24c71957fb0c1f3d04fef4bf15779d 100644 (file)
@@ -32,9 +32,6 @@
 
 #define CONFIG_FACTORYSET
 
-/* ENET Config */
-#define CONFIG_FEC_XCV_TYPE            RMII
-
 /* ENET1 connects to base board and MUX with ESAI */
 #define CONFIG_FEC_ENET_DEV            1
 #define CONFIG_FEC_MXC_PHYADDR         0x0
index ce36b2e3eaed25c054ad76a15b86e6865fce53e2..bd5c072382a8a3695b38294f6349bf958ea33740 100644 (file)
 
 /* Networking */
 #define CONFIG_FEC_MXC_PHYADDR         -1
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define FEC_QUIRK_ENET_MAC
 
 #endif /* __CGTQMX8_H */
index 0b059d7ab87502ce2bca916e7a394b572b1eb76c..8af80f58f8ec6478164a3fadcdb251b634f4566a 100644 (file)
@@ -13,7 +13,6 @@
 #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
 
 /* Network */
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 
 /* ENET1 */
index e41c76bfb9289dcc34566f9ec5bd222ea22e4bc0..90720c2f9b5665da8fa8d0fc6f7256e2210bade7 100644 (file)
 
 /* Ethernet */
 #define CONFIG_FEC_MXC_PHYADDR         0
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 
 /* USB */
index 804dfb448056bfe77bbf142af51bca34d373f19d..3d3fab517e3ab510954886d70b8e6a1e67273386 100644 (file)
@@ -32,7 +32,6 @@
 
 /* FEC ethernet */
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         7
 
 /* MMC Configs */
index e6fc65e0d41e06508b797bd9deff5ef75b7d37f1..65f8944ccaf67d06f53b9d00f9d9682ef7e523c0 100644 (file)
@@ -23,7 +23,6 @@
 
 
 /* Ethernet Configs */
-#define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR         0
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
index c97223eb29e53498d75fc28b2aa9640200008bb6..cd1eafdd5c94c2fea7ab5563ff63bd84303a0ceb 100644 (file)
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         0
 #define FEC_QUIRK_ENET_MAC
 
index 2c568a68549e6f2a8a27d0ba837bb74e98ecdada..e4805951fae6ce55a4fbde9046e84a9b96e3ba86 100644 (file)
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
 /* FEC*/
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 #define IMX_FEC_BASE                   0x30BE0000
index 4f5fe6a78756427f2cf49fd59b101bdd6dd0bfbb..32c937abb0e5bb4bee0662c187c8cbbca1377a40 100644 (file)
@@ -83,7 +83,6 @@
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index 374b476d12ee5bbe9e09501aaaed1d18744fdf4d..1ec27f40f2b5142c66491332488e6bccebd3521e 100644 (file)
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
 /* FEC */
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index 227cfda3e6bbaf80ef35df557d969caf5ea464c7..7fed9a38c1db6f9b64703870758dae511405e845 100644 (file)
 
 /* ENET Config */
 #if defined(CONFIG_FEC_MXC)
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR 0
 #define FEC_QUIRK_ENET_MAC
 #define IMX_FEC_BASE                   0x30BE0000
index 1540e4b49ade049e5cbc1a11c7f36d9d14eabfe9..318289b76bcd7ba2b1de06e4deecdb09bb48d2ed 100644 (file)
 
 #include <config_distro_bootcmd.h>
 
-/* ENET */
-#if defined(CONFIG_FEC_MXC)
-#define CONFIG_FEC_XCV_TYPE            RGMII
-#endif /* CONFIG_FEC_MXC */
-
 #define MEM_LAYOUT_ENV_SETTINGS \
        "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
        "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
index 1476431943e2f23b8d056b26bd0b0265ec4b1641..c01a590c8af6df88c24991faa532b08a5e58dcc0 100644 (file)
@@ -97,7 +97,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
 /* FEC */
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index f08193a7f356578a43b095ecea8099d83d43085c..fe07a3cde6264435fcc2a56bdb4a4ff20efaacb3 100644 (file)
@@ -33,7 +33,6 @@
 #endif
 
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          1
 #define FEC_QUIRK_ENET_MAC
 
index 287782b2462e3c5cebfd3c4ac5b8bd269cc51876..62e06d230348dc0ababda7f8682917f0accd3b81 100644 (file)
@@ -41,7 +41,6 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          4
 #define FEC_QUIRK_ENET_MAC
 
index 4140dd7a9d193f9c1ae0f2ac472dbe9175c7ec1c..8fff3bf632e8ecd7732af0575deb0f0c3754d527 100644 (file)
@@ -38,7 +38,6 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index 9d56e33e8415e1d61517bfe3ff7a04c3fce71297..6919f6d660ec92504031356840d76a82bf2ffeea 100644 (file)
@@ -32,7 +32,6 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index c12f383655bd1300778c5f521d13d8257ad0e08e..0fe38e61c4b7b7986e73360592fb88ab8429ced0 100644 (file)
 /* Generic Timer Definitions */
 #define COUNTER_FREQUENCY              8000000 /* 8MHz */
 
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 #endif /* __IMX8QM_MEK_H */
index 5fcc96325ad9603bda703e844524f7e648e08003..7532c6e7551d2d6fa13f34e2027bdc3ea8d23318 100644 (file)
 /* Generic Timer Definitions */
 #define COUNTER_FREQUENCY              8000000 /* 8MHz */
 
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 #include <linux/stringify.h>
 #endif /* __IMX8QM_ROM7720_H */
index b1c51e72bf60e30408af73437c64d2f3be8cdd94..beb35c93435fd1ad256c2baf9711add607e62ec0 100644 (file)
 #define CONFIG_PCA953X
 #endif
 
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 /* Misc configuration */
 #define CONFIG_SYS_CBSIZE      2048
 #define CONFIG_SYS_MAXARGS     64
index 07d8d65f716a29634e72aa339ef366d08bc8fd64..ddb3d444f03d1c815c2c03cf8aff48779173548e 100644 (file)
@@ -31,7 +31,6 @@
 #if defined(CONFIG_FEC_MXC)
 #define PHY_ANEG_TIMEOUT               20000
 
-#define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR         1
 
 #define IMX_FEC_BASE                   0x29950000
index e2c14c7373d5af1ed441021b3abf16835e8d8a52..2c0ad96e0d41a6d6f7b01068ec1633b2f5d0d206 100644 (file)
@@ -32,7 +32,6 @@
 
 /* ENET1 Config */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index 8d062aa4638a9a0e22c19764457704675540557d..d0960bcaf9ae2e62776cc89126c0b111ffe63d87 100644 (file)
 
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x0
-#define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 
 #endif
index 9ec249722c955f0fe8b4a999680d554e10183fe3..dd803e7053cbd1501a301185ae35b720b9debe91 100644 (file)
@@ -72,7 +72,6 @@
 #define IMX_FEC_BASE                   FEC_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x0
 #define CONFIG_DISCOVER_PHY
-#define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 
 #define CONFIG_SYS_RTC_BUS_NUM         1 /* I2C2 */
index c2cf1f34ce693ce73695e87be0a10d1bb57fece4..372cf8dd71145a1547e6870a356850ea89f5a072 100644 (file)
 #define IMX_FEC_BASE                   ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x0
 
-#define CONFIG_FEC_XCV_TYPE             RGMII
-
 #ifdef CONFIG_CMD_USB
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
index 7ab641f7c0721aad0201bb7c7f5bc2771d5ee096..a46f515f10d3e1c1143a3a12adcf40031d856da0 100644 (file)
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x1
 
-#define CONFIG_FEC_XCV_TYPE             RGMII
-
 #ifdef CONFIG_CMD_USB
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
index fdea1cbc28230c6ad2317d12051ba84df33662a6..4be5d7897d88baef202a9384bb43375d858cd33d 100644 (file)
 #if (CONFIG_FEC_ENET_DEV == 0)
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x2
-#define CONFIG_FEC_XCV_TYPE             RMII
 #elif (CONFIG_FEC_ENET_DEV == 1)
 #define IMX_FEC_BASE                   ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x1
-#define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 #endif
 
index 7a513c1ba90c0c8faa3ce0598f5ef1c30cc595d5..8dcc45c9e5d6a9138298de39e3bd8008183e00c3 100644 (file)
 #define CONFIG_PL01x_PORTS             { (void *)MXS_UARTDBG_BASE }
 /* Default baudrate can be overridden by board! */
 
-/* FEC Ethernet on SoC */
-#ifdef CONFIG_FEC_MXC
-#ifndef CONFIG_FEC_XCV_TYPE
-#define CONFIG_FEC_XCV_TYPE            RMII
-#endif
-#endif
-
 /* NAND */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
index d082fbd824fb0d3252e3c35381c2baf8686913c5..afa4ca5b5af3ef59a42fd5520b8ce75aa3c4dcce 100644 (file)
@@ -29,7 +29,6 @@
 #endif
 
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         6
 
 /* USB Configs */
index 31cf63d86479f957c73becf24569e366215ef2e1..1e40fad9644fc4871973f6b7dcd9f4aa5d301f97 100644 (file)
@@ -48,7 +48,6 @@
 #ifdef CONFIG_CMD_NET
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x1
-#define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 
 #define CONFIG_FEC_ENET_DEV            1
index 72515a32e16d3d243c606cd85837646b1c41cf86..7777935ba6ee39a7c69924c0ee2850911ebea6b6 100644 (file)
 #      define CONFIG_MXC_USB_PORTSC            (PORT_PTS_UTMI | PORT_PTS_PTW)
 #endif /* CONFIG_CMD_USB */
 
-#if IS_ENABLED(CONFIG_FEC_MXC)
-#      define CONFIG_FEC_XCV_TYPE      RMII
-#endif /* CONFIG_FEC_MXC */
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "mmcdev=0\0" \
        "mmcpart=2\0" \
index 4f9a0f030109b9b362cc704e4fd8fb68e596c36e..63f6b149d01fd16d8237db67b08945be398f086f 100644 (file)
 
 /* Ethernet Configuration */
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         1
 
 /* Framebuffer */
index d87bcf45d6e0e34c13d696c666a7005dc9005c87..f63ebb481175a0785b5faf465a53dbff217951de 100644 (file)
@@ -29,7 +29,6 @@
 
 #define IMX_FEC_BASE                   ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x1
-#define CONFIG_FEC_XCV_TYPE            RMII
 
 #define CONFIG_MXC_UART_BASE           UART6_BASE_ADDR
 
index 85f6129337d5196ea3fe8e7dbe48ba56b2d1cb04..26946cd65ac682256a4aefd8bdf293b1ea62d790 100644 (file)
@@ -32,7 +32,6 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         1
 #define FEC_QUIRK_ENET_MAC
 
index a9e8c264e9defc90e825eedc7daecc2c07c9e3c3..9946fe92fb4af1bac3161cb332de86c97780fab4 100644 (file)
@@ -80,7 +80,6 @@
 #ifdef CONFIG_CMD_NET
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x1
-#define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 
 #endif
index 4233ecd64eb6ad97133c21703638e4e8e8dc53be..899c218727f363f5c7939895ed1815966756fead 100644 (file)
@@ -9,8 +9,6 @@
 #ifndef __CONFIG_TQMA6_MBA6_H
 #define __CONFIG_TQMA6_MBA6_H
 
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 #define CONFIG_FEC_MXC_PHYADDR         0x03
 
 #define CONFIG_MXC_UART_BASE           UART2_BASE
index 88a652e6d00a46db7c821a480337841d85ffd95d..90db96599c1ba59e3842f8e9afd04e8121ca40f7 100644 (file)
@@ -7,7 +7,6 @@
 #define __CONFIG_TQMA6_WRU4_H
 
 /* Ethernet */
-#define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR         0x01
 
 /* UART */
index 4811e98810bc607587d45b35913eb9e88969af25..de84e3b66350968b44560daf1342be45f98b61a1 100644 (file)
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
 /* ENET */
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          7
 #define FEC_QUIRK_ENET_MAC
 #define IMX_FEC_BASE                   0x30BE0000
index 6bfc121d106fcb6b185db7edcc415b7f7cb2759a..9a7dedf1ea57f29de5d05d8a049445ec6a3b5cdc 100644 (file)
@@ -35,7 +35,6 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         7
 #define FEC_QUIRK_ENET_MAC
 
index d90c2fa053453a0253c4d6482327bfdf08320884..ebae8223fe2cfa7bc48955e87f5c73cc5fd47ac2 100644 (file)
@@ -24,7 +24,6 @@
 #define CONFIG_SYS_FSL_ESDHC_NUM       1
 
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 
 /* I2C Configs */
index 521f32505755a73fe30bf438f736278ecfe2cbb3..e101739858facf020a60fb93285be53c1629677a 100644 (file)
@@ -47,8 +47,6 @@
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x0
 
-#define CONFIG_FEC_XCV_TYPE             RMII
-
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS   0
index 91f6d67d27445aa3ac12460205db82a9409e35e5..13cfa2cd4bdfb4818ab2d0d5f573e6730bbdfeb5 100644 (file)
@@ -45,7 +45,6 @@
 #define CONFIG_FEC_ENET_DEV            0
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x0
-#define CONFIG_FEC_XCV_TYPE             RMII
 
 #define CONFIG_UBOOT_SECTOR_START      0x2
 #define CONFIG_UBOOT_SECTOR_COUNT      0x3fe