]> git.dujemihanovic.xyz Git - u-boot.git/commit
clk: clk_versaclock: Add support for versaclock driver
authorAdam Ford <aford173@gmail.com>
Fri, 4 Jun 2021 17:26:06 +0000 (12:26 -0500)
committerTom Rini <trini@konsulko.com>
Sat, 21 Aug 2021 22:23:02 +0000 (18:23 -0400)
commitdcf2cee77f2d185418b741c91ea981390fa6231f
tree36b667082e808ed75e1c99e10f6c47e2fa833337
parent79d389a54891a67269bfa366f044a2079409e499
clk: clk_versaclock: Add support for versaclock driver

The driver is based on the Versaclock driver from the Linux code, but
due differences in the clock API between them, some pieces had to be
changed.

This driver creates a mux, pfd, pll, and a series of fod ouputs.
 Rate               Usecnt      Name
------------------------------------------
 25000000             0        `-- x304-clock
 25000000             0            `-- clock-controller@6a.mux
 25000000             0                |-- clock-controller@6a.pfd
 2800000000           0                |   `-- clock-controller@6a.pll
 33333333             0                |       |-- clock-controller@6a.fod0
 33333333             0                |       |   `-- clock-controller@6a.out1
 33333333             0                |       |-- clock-controller@6a.fod1
 33333333             0                |       |   `-- clock-controller@6a.out2
 50000000             0                |       |-- clock-controller@6a.fod2
 50000000             0                |       |   `-- clock-controller@6a.out3
 125000000            0                |       `-- clock-controller@6a.fod3
 125000000            0                |           `-- clock-controller@6a.out4
 25000000             0                `-- clock-controller@6a.out0_sel_i2cb

A translation function is added so the references to <&versaclock X> get routed
to the corresponding clock-controller@6a.outX.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/clk_versaclock.c [new file with mode: 0644]