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armv8: cache_v8: fix mmu_set_region_dcache_behaviour
authorPeng Fan <peng.fan@nxp.com>
Mon, 11 May 2020 08:41:07 +0000 (16:41 +0800)
committerTom Rini <trini@konsulko.com>
Mon, 25 May 2020 15:54:53 +0000 (11:54 -0400)
commitb4b26192112bd2c225b8e424c2e2d360761cd864
treecc3e143494ace3b5b27a66ed568d5159ca2da079tree | snapshot
parent9c5fef577494769e3ff07952a85f9b7125ef765bcommit | diff
armv8: cache_v8: fix mmu_set_region_dcache_behaviour

The enum dcache_optoion contains a shift left 2 bits in the armv8 case
already.  The PMD_ATTRINDX(option) macro will perform a left shift of 2
bits.  Perform a right shift so that in the end we get the correct
value.

[trini: Reword the commit message]
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
arch/arm/cpu/armv8/cache_v8.c diff | blob | history
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