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(parent: 234d89d) | patch
iomux-v3: Add support for mx6sl LVE bit
authorFabio Estevam <fabio.estevam@freescale.com>
Tue, 29 Apr 2014 13:15:46 +0000 (10:15 -0300)
committerStefano Babic <sbabic@denx.de>
Fri, 9 May 2014 13:10:53 +0000 (15:10 +0200)
commit98d2cffd23503225108e0ceb36dbe6b1bbd93ed6
tree2607681c73e535c3993c9f26d333d2ea3a87c87btree | snapshot
parent234d89dac61a4f57a0f7cb136a6c442f37a6c9b8commit | diff
iomux-v3: Add support for mx6sl LVE bit

On mx6sl there is a LVE (Low Voltage Enable) bit in the IOMUXC_SW_PAD_CTL
register that can enable or disable low voltage on the pad.

LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the
calculation easier we can define it as a flag in bit 1, since this bit is unused.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Otavio Salvador <otavio@ossystems.com.br>
arch/arm/imx-common/iomux-v3.c diff | blob | history
arch/arm/include/asm/imx-common/iomux-v3.h diff | blob | history
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