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board: ti: am43xx-idk: Configure the CDCE913 clock synthesizer
authorTero Kristo <t-kristo@ti.com>
Fri, 27 Sep 2019 16:14:28 +0000 (19:14 +0300)
committerTom Rini <trini@konsulko.com>
Fri, 11 Oct 2019 17:32:39 +0000 (13:32 -0400)
commit9850d4e52f7f8da1bab7fae32f90e8eba7b4f6af
treeeda030a2d6c8602a85030b59d91d9a8ad803aaa0tree | snapshot
parente8e683d33b0ccd43e03809bf4ea88a899a867473commit | diff
board: ti: am43xx-idk: Configure the CDCE913 clock synthesizer

AM43xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
arch/arm/dts/am437x-idk-evm-u-boot.dtsi diff | blob | history
board/ti/am43xx/board.c diff | blob | history
configs/am43xx_evm_defconfig diff | blob | history
My U-Boot fork