]> git.dujemihanovic.xyz Git - u-boot.git/commit
drivers/ddr/fsl: Modify binding registers to save time on data init
authorYork Sun <york.sun@nxp.com>
Mon, 29 Jan 2018 17:44:37 +0000 (09:44 -0800)
committerYork Sun <york.sun@nxp.com>
Tue, 30 Jan 2018 17:14:07 +0000 (09:14 -0800)
commit944537c56e7bf51efef640408113d707cd0ad9f0
tree1051b0488ab50a39badc166d44920d15f58bbd02
parent564e9383e53b567114bd3403246c0759a6d69c50
drivers/ddr/fsl: Modify binding registers to save time on data init

DDR controllers always use binding register to determine the memory
space to perform data initialization. In case of controller interleaving,
the space is doubled, resulting twice long wait. It wasn't too bad until
the memory capacity increases. To reduce the wait time, reduce the
binding space to half and restore it after data initialization.
Three-way interleaving is no longer used and is removed.

Signed-off-by: York Sun <york.sun@nxp.com>
drivers/ddr/fsl/fsl_ddr_gen4.c