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board: ti: am65x: Set SERDES0 mux to PCIe to use USB 2.0 interface
authorAswath Govindraju <a-govindraju@ti.com>
Fri, 20 Nov 2020 15:48:53 +0000 (21:18 +0530)
committerLokesh Vutla <lokeshvutla@ti.com>
Tue, 12 Jan 2021 04:51:40 +0000 (10:21 +0530)
commit6f9d41403a054cf2ce5cd7484a72ee81eeaac34a
tree39bc236a7d34ba77f6054ddb0a78d8405d7656a8tree | snapshot
parentd71be1990218957b9f05dbf13a72859a2abe06d7commit | diff
board: ti: am65x: Set SERDES0 mux to PCIe to use USB 2.0 interface

It has been observed that setting SERDES0 lane mux to USB prevents USB 2.0
operation on USB0. Setting SERDES0 lane mux to non-USB when USB0 is used in
USB 2.0 only mode solves this issue. However, for USB3.0+2.0 operation this
issue is not present.

Implement this workaround by writing 1 to LANE_FUNC_SEL field in
CTRLMMR_SERDES0_CTRL register.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
board/ti/am65x/evm.c diff | blob | history
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