]> git.dujemihanovic.xyz Git - u-boot.git/commit
riscv: mbv: Enable SPL and binman
authorMichal Simek <michal.simek@amd.com>
Wed, 14 Feb 2024 11:52:33 +0000 (12:52 +0100)
committerMichal Simek <michal.simek@amd.com>
Fri, 1 Mar 2024 07:41:39 +0000 (08:41 +0100)
commit451b2ea21105ec302369093f2d1e25183d35fd3d
treeab2dbe72298d4d79b372ea8fad1e97a128c07226
parent9600e8d39ccf4daa1ac3aca54bc596985904e245
riscv: mbv: Enable SPL and binman

Enable SPL and binman to generate u-boot.img (machine mode) and u-boot.itb
(supervisor mode). DTB is placed at fixed address to ensure that it is 8
byte aligned which is not ensured when dtb is attached behind SPL binary
that's why SPL and U-Boot are taking DTB from the same address.
Also align addresses for both defconfigs.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/85506bce5580d448f095f267d029e3932c5e9990.1707911544.git.michal.simek@amd.com
arch/riscv/dts/xilinx-mbv32.dts
board/xilinx/common/board.c
board/xilinx/mbv/Kconfig
board/xilinx/mbv/board.c
configs/xilinx_mbv32_defconfig
configs/xilinx_mbv32_smode_defconfig