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riscv: andes: Rearrange Andes PLICSW to single-bit-per-hart strategy
authorRandolph <randolph@andestech.com>
Thu, 12 Oct 2023 05:35:34 +0000 (13:35 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 19 Oct 2023 09:29:33 +0000 (17:29 +0800)
commit04b2123b4d28c47587e038df9861838c55e3365e
tree05f65d76fd7da54fb079d4bedbde6cdaf271836btree | snapshot
parent5a348ccf025702fc6bb30d9c8da367a9e78d3d2bcommit | diff
riscv: andes: Rearrange Andes PLICSW to single-bit-per-hart strategy

Source hart information is not necessary in IPI, so we could
use single-bit-per-hart strategy to rearrange PLICSW mapping.

Bit 0 of Interrupt Pending Bits is hardwired to 0.
Therefore, we use bit 1 to send IPI to hart 0,
bit 2 to hart 1, ..., and so on.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/lib/andes_plicsw.c diff | blob | history
My U-Boot fork