Christian Hewitt [Wed, 15 Sep 2021 01:46:59 +0000 (01:46 +0000)]
doc: boards: amlogic: update for Radxa Zero
Add documentation bits for the Radxa Zero
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: updated u200 MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Christian Hewitt [Wed, 15 Sep 2021 01:46:58 +0000 (01:46 +0000)]
boards: amlogic: add Radxa Zero defconfig
Add a defconfig for the Radxa Zero SBC, using an Amlogic S905Y2 chip.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: updated u200 MAINTAINERS & add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Christian Hewitt [Wed, 15 Sep 2021 01:46:57 +0000 (01:46 +0000)]
ARM: dts: add support for Radxa Zero
Import the initial dts queued for Linux 5.16.y
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Christian Hewitt [Wed, 15 Sep 2021 01:46:56 +0000 (01:46 +0000)]
ARM: dts: sort Amlogic Makefile section
Alpha sort the Amlogic dtb list (same as the kernel).
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Vyacheslav Bocharov [Mon, 20 Sep 2021 08:40:16 +0000 (11:40 +0300)]
ARM: amlogic: add JetHub D1/H1 docs
Fix doc/board/amlogic/index.rst:
- Add S905W to S905X column.
- Add JetHub devices to the corresponding columns.
- Fix tabs to spaces for table alignment
Add doc/board/amlogic files:
- jethub-j100.rst
- jethub-j80.rst
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Vyacheslav Bocharov [Mon, 20 Sep 2021 08:40:15 +0000 (11:40 +0300)]
ARM: amlogic: add JetHub D1/H1 device support
Add support for new home automation devices.
JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation controller with the following features:
- DIN Rail Mounting case
- Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz
- no video out
- 512Mb/1GB DDR3
- 8/16GB eMMC flash
- 1 x USB 2.0
- 1 x 10/100Mbps ethernet
- WiFi / Bluetooth AMPAK AP6255 (Broadcom BCM43455) IEEE 802.11a/b/g/n/ac, Bluetooth 4.2.
- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support.
- 2 x gpio LEDS
- GPIO user Button
- 1 x 1-Wire
- 2 x RS-485
- 4 x dry contact digital GPIO inputs
- 3 x relay GPIO outputs
- DC source with a voltage of 9 to 56 V / Passive POE
JetHome Jethub H1 (http://jethome.ru/jethub-h1) is a home automation controller with the following features:
- Square plastic case
- Amlogic S905W (ARM Cortex-A53) quad-core up to 1.5GHz
- no video out
- 1GB DDR3
- 8/16GB eMMC flash
- 2 x USB 2.0
- 1 x 10/100Mbps ethernet
- WiFi / Bluetooth RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0.
- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support.
- MicroSD 2.x/3.x/4.x DS/HS cards.
- 1 x gpio LED
- ADC user Button
- DC source 5V microUSB with serial console
Patches from:
- JetHub H1
https://lore.kernel.org/r/
20210915085715.
1134940-4-adeep@lexina.in
https://git.kernel.org/amlogic/c/
abfaae24ecf3e7f00508b60fa05e2b6789b8f607
- JetHub D1
https://lore.kernel.org/r/
20210915085715.
1134940-5-adeep@lexina.in
https://git.kernel.org/amlogic/c/
8e279fb2903990cc6296ec56b3b80b2f854b6c79
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: removed unused variable value]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Vyacheslav Bocharov [Mon, 20 Sep 2021 08:40:14 +0000 (11:40 +0300)]
ARM: amlogic: add JetHub common config header
JetHub devices uses its own boot sequence with "rescue" button
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 17 Sep 2021 07:37:09 +0000 (09:37 +0200)]
ARM: amlogic: add Banana Pi M5
Banana Pi BPI-M5 is a credit card format SBC with the following features:
- Amlogic S905X3 quad core Cortex-A55
- Mali-G31 GPU
- 4GB LPDDR4
- 16GB eMMC flash
- 4 USB 3.0
- 1 GbE ethernet
- HDMI output
- 2x LEDS
- SDCard
- 2.5mm Jack with Stereo Audio + CVBS
- Infrared Received
- ADC Button
- GPIO Button
- 40 pins header + 3pins debug header
[narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 17 Sep 2021 07:37:08 +0000 (09:37 +0200)]
ARM: meson: add Beelink GS-King X board
The Beelink GS-King X is a variant of the GS King boards but with an internal
USB to SATA bridge and advanced audio features.
[narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 17 Sep 2021 07:37:07 +0000 (09:37 +0200)]
doc: boards: amlogic: update for Odroid HC4
Add documentation bits for the Odroid-HC4.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 17 Sep 2021 07:37:06 +0000 (09:37 +0200)]
ARM: amlogic: add support for Odroid-HC4 device
The Odroid-HC4 is a variant of the Odroid-C4 board but with a PCIe-SATA bridge
instead of the USB3 ports.
[narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 17 Sep 2021 07:37:05 +0000 (09:37 +0200)]
distro_bootcmd: run pci enum for scsi_boot just like it is done for nvme_boot
The SCSI device can be a PCIe adapter, so run pcie enum if enabled.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 17 Sep 2021 07:37:04 +0000 (09:37 +0200)]
configs: meson64: add SCSI boot target
Add SCSI target to be able to boot from the SATA disks on the Odroid HC4 using
an on-board AHCI PCIe controller.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Neil Armstrong [Fri, 17 Sep 2021 07:37:03 +0000 (09:37 +0200)]
ARM: meson-axg: remove local USB nodes
Drop the local USB nodes after Linux 5.14 sync.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 17 Sep 2021 07:37:02 +0000 (09:37 +0200)]
ARM: meson: keep HW order for MMC devices
Since Linux commmit [1], the order is fixed with aliases, in order to keep the
MMC device order, set it back to HW order in U-Boot dtsi files.
[1]
ab547c4fb39f ("arm64: dts: amlogic: Assign a fixed index to mmc devices")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 17 Sep 2021 07:37:01 +0000 (09:37 +0200)]
usb: dwc3: meson-gxl: add AXG compatible
Upstream Linux uses the "amlogic,meson-axg-usb-ctrl" for AXG SoCs.
This adds it to the compatible list for this driver.
Reported-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Vyacheslav Bocharov <adeep@lexina.in>
Neil Armstrong [Fri, 17 Sep 2021 07:37:00 +0000 (09:37 +0200)]
ARM: meson: Sync Amlogic DT from Linux 5.14
Import Amlogic DT changes from Linux commit
7d2a07b76933 ("Linux 5.14"),
dt-bindings clock changes and new meson-g12b-gsking-x.dts,
meson-sm1-bananapi-m5 & odroid-hc4 boards.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Wed, 8 Sep 2021 12:32:12 +0000 (14:32 +0200)]
pci: pcie_dw_meson: fix usb fail when pci link fails to go up
On Amlogic A311D, when the PCIe link fails disabling the related clocks
makes USB fail. For an unknown reason, this doesn happen on the S905D3 SoC.
Mimic the Linux behavior by not considering a link failure a probe failure,
and continue even if the PCIe link is down.
Reported-by: Art Nikpal <email2tema@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Christian Hewitt [Fri, 20 Aug 2021 02:18:36 +0000 (02:18 +0000)]
ARM: meson: Add S905Y2 SOC ID
Add the SOC ID for the S905Y2 to board info, see below for before/after
tested with a Radxa Zero board:
SoC: Amlogic Meson G12A (Unknown) Revision 28:b (30:2)
SoC: Amlogic Meson G12A (S905Y2) Revision 28:b (30:2)
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tom Rini [Wed, 6 Oct 2021 16:26:33 +0000 (12:26 -0400)]
Merge branch '2021-10-06-assorted-improvements'
- Use better values for ACPI OEM_VERSION
- Assorted NAND related Kconifg migrations and another dependency fix
Tom Rini [Wed, 22 Sep 2021 18:50:39 +0000 (14:50 -0400)]
Convert CONFIG_NAND_OMAP_ECCSCHEME to Kconfig
The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in
include/linux/mtd/omap_gpmc.h for valid ECC schemes. Make which one we
will use be a choice statement, enumerating the ones which we have
implemented.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:38 +0000 (14:50 -0400)]
Convert CONFIG_SYS_NAND_U_BOOT_LOCATIONS et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_NAND_U_BOOT_LOCATIONS
CONFIG_SYS_NAND_U_BOOT_OFFS
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:37 +0000 (14:50 -0400)]
Convert CONFIG_NAND_FSL_ELBC et al to Kconfig
This converts the following to Kconfig:
CONFIG_NAND_FSL_ELBC
CONFIG_NAND_FSL_IFC
Note that a number of PowerPC platforms had previously enabled
CONFIG_NAND_FSL_ELBC without CONFIG_MTD_RAW_NAND, and now they no longer
enable the option, reducing the size of a few functions.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:36 +0000 (14:50 -0400)]
Convert CONFIG_SYS_NAND_MAX_CHIPS to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_NAND_MAX_CHIPS
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:35 +0000 (14:50 -0400)]
nand.h: Cleanup linux/mtd/rawnand.h usage
We only include <linux/mtd/rawnand.h> in <nand.h> for the forward
declaration of struct nand_chip, so do that directly. Then, include
<linux/mtd/rawnand.h> where required directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:34 +0000 (14:50 -0400)]
Convert CONFIG_SYS_NAND_ONFI_DETECTION to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_NAND_ONFI_DETECTION
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:33 +0000 (14:50 -0400)]
Convert CONFIG_SYS_NAND_5_ADDR_CYCLE to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_NAND_5_ADDR_CYCLE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:32 +0000 (14:50 -0400)]
Convert CONFIG_SYS_NAND_BAD_BLOCK_POS to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_NAND_BAD_BLOCK_POS
In order to do this, introduce a choice for HAS_LARGE/SMALL_BADBLOCK_POS
as those are the only valid values. Use LARGE as the default as no
in-tree boards use SMALL, but it is possible.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:31 +0000 (14:50 -0400)]
nand_spl_simple: Drop CONFIG_SYS_NAND_4_ADDR_CYCLE support
This code is unused, drop it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:30 +0000 (14:50 -0400)]
Convert CONFIG_SYS_NAND_PAGE_COUNT to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_NAND_PAGE_COUNT
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:29 +0000 (14:50 -0400)]
Convert CONFIG_SPL_NAND_LOAD et al to Kconfig
This converts the following to Kconfig:
CONFIG_SPL_NAND_LOAD
CONFIG_SYS_NAND_BLOCK_SIZE
CONFIG_SYS_NAND_PAGE_SIZE
CONFIG_SYS_NAND_OOBSIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:28 +0000 (14:50 -0400)]
Convert CONFIG_NAND_LPC32XX_MLC to Kconfig
This converts the following to Kconfig:
CONFIG_NAND_LPC32XX_MLC
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:27 +0000 (14:50 -0400)]
m53menlo: Switch to deriving CONFIG_SYS_NAND_PAGE_COUNT
Typically platforms will define CONFIG_SYS_NAND_PAGE_COUNT based on
CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE. Switch to this
in preparation for migrating CONFIG_SYS_NAND namespace to Kconfig.
Cc: Marek Vasut <marex@denx.de>
Cc: Olaf Mandel <o.mandel@menlosystems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 22 Sep 2021 18:50:26 +0000 (14:50 -0400)]
rk3308: Remove unused NAND defines
These platforms do not currently enable NAND, remove these references.
Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Oleksandr Suvorov [Thu, 16 Sep 2021 12:03:36 +0000 (15:03 +0300)]
lib: rsa: fix dependency for SPL_RSA_VERIFY
SPL_RSA_VERIFY requires SPL_RSA to be enabled. Add correct
dependency.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Pali Rohár [Sat, 10 Jul 2021 11:10:01 +0000 (13:10 +0200)]
acpi: Use U-Boot version for OEM_REVISION
OEM_REVISION is 32-bit unsigned number. It should be increased only when
changing software version. Therefore it should not depend on build time.
Change calculation to use U-Boot version numbers and set this revision
to date number.
Prior this change OEM_REVISION was calculated from build date and stored in
the same format.
After this change macro U_BOOT_BUILD_DATE is not used in other files so
remove it from global autogenerated files and also from Makefile.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 5 Oct 2021 21:16:23 +0000 (17:16 -0400)]
Merge branch '2021-10-05-general-updates'
- Assorted OPTEE cleanups
- pinctrl, gpio improvements, assorted livetree migrations
- Assorted pytest improvements
Patrick Delaunay [Mon, 20 Sep 2021 16:27:20 +0000 (18:27 +0200)]
reboot-mode: migrate uclass to livetree
Use dev_ function to support a live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 20 Sep 2021 15:58:33 +0000 (17:58 +0200)]
demo: migrate uclass to livetree
Use dev_ function to read the sides and colour to support a live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 20 Sep 2021 15:56:06 +0000 (17:56 +0200)]
remoteproc: migrate uclass to livetree
Use dev_ function to read the name and boolean to support a live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 19 Sep 2021 21:14:51 +0000 (15:14 -0600)]
doc: test: Explain how to run pytests in parallel
Add documentation for this so people can try it out. At present it does
not fully work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 19 Sep 2021 21:14:50 +0000 (15:14 -0600)]
test: Allow tpm2 tests to run in parallel
These tests currently run in a particular sequence, with some of them
depending on the actions of earlier tests.
Add a check for sandbox and reset to a known state at the start of each
test, so that all tests can run in parallel.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 19 Sep 2021 21:14:49 +0000 (15:14 -0600)]
test: Allow hush tests to run in parallel
The -z tests don't really need to be part of the main set. Separate them
out so we can drop the test setup/cleans functions and thus run all tests
in parallel.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 19 Sep 2021 21:14:48 +0000 (15:14 -0600)]
test: Allow vboot tests to run in parallel
Update the tests to use separate working directories, so we can run them
in parallel. It also makes it possible to see the individual output files
after the tests have completed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Alexandru Gagniuc [Wed, 15 Sep 2021 19:33:01 +0000 (14:33 -0500)]
test/py: Check hashes produced by mkimage against known values
Target code and mkimage share the same hashing infrastructure. If one
is wrong, it's very likely that both are wrong in the same way. Thus
testing won't catch hash regressions. This already happened in
commit
92055e138f28 ("image: Drop if/elseif hash selection in
calculate_hash()"). None of the tests caught that CRC32 was broken.
Instead of testing hash_calculate() against itself, create a FIT with
containing a kernel with pre-calculated hashes. Then check the hashes
produced against the known good hashes.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Samuel Holland [Sat, 11 Sep 2021 22:05:53 +0000 (17:05 -0500)]
gpio: Factor out DT flag translation
The generic GPIO flags binding is shared across many drivers, some of
which need their own xlate function. Factor out the flag translation
code from gpio_xlate_offs_flags so it does not need to be duplicated.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Samuel Holland [Sat, 11 Sep 2021 22:05:52 +0000 (17:05 -0500)]
gpio: Verify validity of pin offsets from device trees
Translation of an OF GPIO specifier should fail if the pin offset is
larger than the number of pins in the GPIO bank.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Samuel Holland [Sat, 11 Sep 2021 22:05:51 +0000 (17:05 -0500)]
gpio: Verify validity of pin offsets when looking up names
Translation of a pin name to a device+offset should fail if the offset
is larger than the number of pins in the GPIO bank.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alexandru Gagniuc [Tue, 7 Sep 2021 17:07:09 +0000 (12:07 -0500)]
arm: imx: mx7: Move CONFIG_OPTEE_TZDRAM_SIZE from lib/optee
This config is only used by three boards with this SOC. Most other
platforms derive this information from devicetree, and are unlikely
to ever need this config.
Moreover, it is confusing when Kconfig asks for this value under
"Support OPTEE images", but does not do anything with the value.
Move it to imx7 for those boards who still make use of it.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Alexandru Gagniuc [Tue, 7 Sep 2021 17:07:08 +0000 (12:07 -0500)]
lib: optee: Remove CONFIG_OPTEE_LOAD_ADDR
This value is not used by u-boot, and it should not. The load address
of an OPTEE image is defined by said image. Either a uImage or a FIT
will have a defined load address and entry point. Those values are the
correct ones, not CONFIG_OPTEE_LOAD_ADDR.
Commit
f25006b96e9f ("optee: Add CONFIG_OPTEE_LOAD_ADDR") justifies
this config by requiring its presence in u-boot's .config for other
images as part of a larger build, claiming it is "the best way".
This argument is not persuasive. U-boot's configuration is driven by
platform requirements, not the other way around. It seems more likely
that the argument is conflating tooling issues with Kconfig. Yocto and
buildroot have excellent mechanisms for defining values across the
board (pun intended). u-boot's Kconfig is the wrong place to do it.
Furthermore, it is not "best" for u-boot because it hardcodes a value
which is then not used. In fact the load address that u-boot uses is
the one derived from the OPTEE image.
Confused yet? I sure was. To prevent future confusion, remove
CONFIG_OPTEE_LOAD_ADDR.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Alexandru Gagniuc [Tue, 7 Sep 2021 17:07:07 +0000 (12:07 -0500)]
lib: optee: Remove CONFIG_OPTEE_TZDRAM_BASE
It is no longer used in u-boot. Information about the TZDRAM location
is usually available in the devicetree as "/reserved-memory/" nodes.
Because this isn't used, remove it.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Alexandru Gagniuc [Tue, 7 Sep 2021 17:07:06 +0000 (12:07 -0500)]
lib: optee: Avoid CONFIG_TZDRAM_* in optee_verify_bootm_image()
The configs TZDRAM_BASE and TZDRAM_SIZE are expected to describe the
memory allocated to the OPTEE region. according to according to commit
c5a6e8bd00cc ("optee: Add optee_verify_bootm_image()"). The TZDRAM is
with some limitations, described by "/reserved-memory" nodes in the
devicetree.
Consequently TZDRAM_BASE and TZDRAM_SIZE can point to imaginary
regions which have nothing to do with actual DRAM. They are not used
to configure the hardware or set up the Trust Zone Controller (TZC)
for OP-TEE -- the devicetree values are used instead.
When a valid OP-TEE image does not fall within the region described by
these configs, u-boot will refuse to load it. In fact, it mostly
serves to cause "bootm" to reject perfectly good OP-TEE images.
Ironically, someone has to correctly configure the devicetree for
TZDRAM, then go back and enter the same information in Kconfig for
"bootm". To remedy this, do not use TZDRAM_BASE and TZDRAM_SIZE in the
verification of OPTEE images.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Patrick Delaunay [Thu, 2 Sep 2021 09:56:17 +0000 (11:56 +0200)]
tee: add a stub for tee_find_device
Add stub for tee_find_device function when CONFIG_TEE is not activated
to simplify the caller code.
This patch allows to remove the CONFIG_IS_ENABLED(OPTEE) tests
for stm32 platform.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@inaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Patrick Delaunay [Thu, 2 Sep 2021 09:56:16 +0000 (11:56 +0200)]
lib: optee: remove the duplicate CONFIG_OPTEE
The configuration CONFIG_OPTEE is defined 2 times:
1- in lib/optee/Kconfig for support of OPTEE images loaded by bootm command
2- in drivers/tee/optee/Kconfig for support of OP-TEE driver.
It is abnormal to have the same CONFIG define for 2 purpose;
and it is difficult to managed correctly their dependencies.
Moreover CONFIG_SPL_OPTEE is defined in common/spl/Kconfig
to manage OPTEE image load in SPL.
This definition causes an issue with the macro CONFIG_IS_ENABLED(OPTEE)
to test the availability of the OP-TEE driver.
This patch cleans the configuration dependency with:
- CONFIG_OPTEE_IMAGE (renamed) => support of OP-TEE image in U-Boot
- CONFIG_SPL_OPTEE_IMAGE (renamed) => support of OP-TEE image in SPL
- CONFIG_OPTEE (same) => support of OP-TEE driver in U-Boot
- CONFIG_OPTEE_LIB (new) => support of OP-TEE library
After this patch, the macro have the correct behavior:
- CONFIG_IS_ENABLED(OPTEE_IMAGE) => Load of OP-TEE image is supported
- CONFIG_IS_ENABLED(OPTEE) => OP-TEE driver is supported
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Bharat Gooty [Tue, 24 Aug 2021 10:16:32 +0000 (15:46 +0530)]
pinctrl: single: Add request() api
Add pinctrl_ops->request api to configure pctrl
pad register in gpio mode.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bharat Gooty [Tue, 24 Aug 2021 10:16:31 +0000 (15:46 +0530)]
pinctrl: single: Parse gpio details from dt
Parse different gpio properties from dt as part of probe
function. This detail is required to enable pinctrl pad
later when gpio lines are requested.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Tom Rini [Mon, 4 Oct 2021 15:27:55 +0000 (11:27 -0400)]
Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 4 Oct 2021 15:09:26 +0000 (11:09 -0400)]
Prepare v2021.10
Signed-off-by: Tom Rini <trini@konsulko.com>
Marek Vasut [Tue, 14 Sep 2021 03:21:48 +0000 (05:21 +0200)]
mtd: cqspi: Fix division by zero
Both dummy.nbytes and dummy.buswidth may be zero. By not checking
the later, it is possible to trigger division by zero and a crash.
This does happen with tiny SPI NOR framework in SPL. Fix this by
adding the check and returning zero dummy bytes in such a case.
Fixes: 38b0852b0ea ("spi: cadence-qspi: Add support for octal DTR flashes")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
[trini: Drop Pratyush's RB as his requested changes weren't made as
Marek disagreed]
Tom Rini [Sun, 3 Oct 2021 23:31:04 +0000 (19:31 -0400)]
Merge branch '2021-10-03-platform-updates' into next
- TI K3 updates, add IOT2050 platform
- rtc rx8025 updates, PCI fixes
Jan Kiszka [Sat, 18 Sep 2021 06:17:56 +0000 (08:17 +0200)]
iot2050: Enable watchdog support, but do not auto-start it
This allows to use the watchdog in custom scripts but does not enforce
that the OS has to support it as well.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sat, 18 Sep 2021 06:17:55 +0000 (08:17 +0200)]
watchdog: rti_wdt: Add support for loading firmware
To avoid the need of extra boot scripting on AM65x for loading a
watchdog firmware, add the required rproc init and loading logic for the
first R5F core to the watchdog start handler. In case the R5F cluster is
in lock-step mode, also initialize the second core. The firmware itself
is embedded into U-Boot binary to ease access to it and ensure it is
properly hashed in case of secure boot.
One possible firmware source is https://github.com/siemens/k3-rti-wdt.
The board is responsible for providing the firmware as additional
loadable via the U-Boot fit image. The driver will pick up its location
from /fit-images/k3-rti-wdt-firmware then.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sat, 18 Sep 2021 06:17:53 +0000 (08:17 +0200)]
board: siemens: Add support for SIMATIC IOT2050 devices
This adds support for the IOT2050 Basic and Advanced devices. The Basic
used the dual-core AM6528 GP processor, the Advanced one the AM6548 HS
quad-core version.
Both variants are booted via a Siemens-provided FSBL that runs on the R5
cores. Consequently, U-Boot support is targeting the A53 cores. U-Boot
SPL, ATF and TEE have to reside in SPI flash.
Full integration into a bootable image can be found on
https://github.com/siemens/meta-iot2050
Based on original board support by Le Jin, Gao Nian and Chao Zeng.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Sat, 18 Sep 2021 06:17:52 +0000 (08:17 +0200)]
arm: dts: Add IOT2050 device tree files
Prepares for the addition of the IOT2050 board which is based on the TI
AM65x. The board comes in four variants, Basic and Advanced, each as
product generation 1 (SR1.0) and 2 (SR2.x), so there are separate dts
files needed. Furthermore, the SPL has its own device tree.
Based on original board support by Le Jin, Gao Nian and Chao Zeng.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:30 +0000 (15:11 +0300)]
pci: pcie_layerscape_fixup_common: lx2_board_fix_fdt can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:29 +0000 (15:11 +0300)]
pci: pcie_layerscape_fixup_common: include fdt_support.h for ft_pci_setup
The function prototype for ft_pci_setup is inside fdt_support.h, we need
to include that header.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:28 +0000 (15:11 +0300)]
pci: layerscape: ls_pcie_conf_address can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:27 +0000 (15:11 +0300)]
pci: _dm_pci_phys_to_bus can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:26 +0000 (15:11 +0300)]
pci: pci_read_config can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:25 +0000 (15:11 +0300)]
pci: pci_write_config can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:24 +0000 (15:11 +0300)]
pci: pciinfo_header can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:23 +0000 (15:11 +0300)]
pci: pci_header_show can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:22 +0000 (15:11 +0300)]
pci: pci_bar_show can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:21 +0000 (15:11 +0300)]
pci: include pci_internal.h inside pci_auto.c
To avoid a build warning with W=1, provide a function prototype for
dm_pciauto_prescan_setup_bridge, which is a non-static function whose
definition is inside pci_auto.c.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Vladimir Oltean [Fri, 17 Sep 2021 12:11:20 +0000 (15:11 +0300)]
pci: provide prototype for pci_skip_dev outside of #if defined(CONFIG_DM_PCI_COMPAT)
The weak definition of pci_skip_dev from drivers/pci/pci_common.c is not
under CONFIG_DM_PCI_COMPAT, and that definition needs a previous
function prototype declaration to avoid W=1 build warnings.
That prototype is not available due to it being under CONFIG_DM_PCI_COMPAT,
so move it outside of that preprocessor block.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Mathew McBride [Fri, 17 Sep 2021 06:46:04 +0000 (06:46 +0000)]
rtc: rx8025: revise single register write to use offset
Writing of individual registers was not functioning
correctly as a 0 'offset' byte under DM-managed
I2C was being appended in front of register we
wanted to access.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Mathew McBride [Fri, 17 Sep 2021 06:46:03 +0000 (06:46 +0000)]
rtc: rx8025: set date in a single i2c transaction
The RX8025/RX8035 does not like having it's time registers
set byte-by-byte in separate I2C transactions.
From the note at the top of the file, it appears
target-dependent workarounds have been used in the
past for this.
Resolve this by setting the time registers in a single
I2C transaction.
As part of this, also ensure the '24/12' flag in the RTC
is reset before writing the date (instead of after), otherwise
the RX8035 will clear the seconds and minutes registers.
Tested on Traverse Ten64 (NXP LS1088A) with RX8035.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Mathew McBride [Fri, 17 Sep 2021 06:46:02 +0000 (06:46 +0000)]
rtc: rx8025: add support for EPSON RX8035.
The RX8035 is a newer model from EPSON which is
very similar in operation to the RX8025.
The changes mirror similar ones that will be
in Linux 5.15:
https://lore.kernel.org/all/
20210709044518.28769-2-matt@traverse.com.au/
The UBOOT_DRIVER ID has also been corrected, previously
it declared itself as rx8010sj_rtc which is a different driver.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Mathew McBride [Fri, 17 Sep 2021 06:46:01 +0000 (06:46 +0000)]
rtc: rx8025: drop non-DM support
A search of the tree showed there is only one user
of this driver (soon to be two) - board/socrates
The second user will be the Traverse Ten64 board.
Both these boards have DM_RTC.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Chia-Wei Wang [Thu, 16 Sep 2021 06:10:09 +0000 (14:10 +0800)]
ARM: dts: ast2600: Make WDT by default disabled
The WDT devices described in the general .dtsi file
should be marked as "disabled" by default.
A WDT should be then enabled in the board specific
.dts file on demands.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Tom Rini [Fri, 10 Sep 2021 21:37:43 +0000 (17:37 -0400)]
arm: ti: k3: Resync dts files and bindings with Linux Kernel v5.14
This resyncs the dts files for all of the currently in-tree K3
platforms, along with relevant bindings, with the v5.14 Linux Kernel
release. Of note are that the main-navss/mcu-navss nodes were renamed
to main_navss / mcu_navss and so the u-boot.dtsi files needed to be
updated to match.
Tested on j721e_evm and am65x_evm.
Signed-off-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Tue, 31 Aug 2021 18:12:24 +0000 (13:12 -0500)]
dt-bindings: pinctrl: k3: Synchronize with v5.14 kernel
Synchronize with the upstream version as of v5.14 kernel tag
Signed-off-by: Nishanth Menon <nm@ti.com>
Tom Rini [Sat, 2 Oct 2021 19:47:28 +0000 (15:47 -0400)]
Merge branch '2021-10-01-assorted-removal-and-migration' into next
- Remove the last non-CONFIG_DM boards, and their related unused code.
- Finish a few partial migrations to Kconfig, and remove some redundant
serial related code.
Tom Rini [Mon, 13 Sep 2021 21:24:54 +0000 (17:24 -0400)]
serial: Remove extraneous SYS_MALLOC_F check
We enforce that DM_SERIAL will have SYS_MALLOC_F enabled and so
SYS_MALLOC_F_LEN will have a value. Remove the build-time check.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Sep 2021 21:24:53 +0000 (17:24 -0400)]
serial: Use the default CONFIG_SYS_BAUDRATE_TABLE in more platforms
A number of platforms are still defining CONFIG_SYS_BAUDRATE_TABLE to
the fallback default of "{ 9600, 19200, 38400, 57600, 115200 }", but
with varying whitespace, or were introduced after the default fallback
was added. Use the default table here.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Sep 2021 21:24:52 +0000 (17:24 -0400)]
Convert CONFIG_BAUDRATE to Kconfig
This converts the following to Kconfig:
CONFIG_BAUDRATE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Sep 2021 21:24:51 +0000 (17:24 -0400)]
kgdb: Remove unused serial related options
We have a few CONFIG options for KGDB that are not referenced, remove
them.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 9 Sep 2021 11:54:53 +0000 (07:54 -0400)]
ppc: Remove MPC8349EMDS board and ARCH_MPC8349 support
This board has not been converted to CONFIG_DM by the deadline.
Remove it.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 9 Sep 2021 11:54:51 +0000 (07:54 -0400)]
arm: Remove bg0900 board
This board has not been converted to CONFIG_DM by the deadline.
Remove it.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 9 Sep 2021 11:54:50 +0000 (07:54 -0400)]
arm: Remove zmx25 board and ARCH_MX25
This board has not been converted to CONFIG_DM by the deadline.
Remove it. As this is the last ARCH_MX25 platform, remove those
references as well.
Cc: Matthias Weisser <weisserm@arcor.de>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 9 Sep 2021 11:54:49 +0000 (07:54 -0400)]
arm: Remove aspenite board
This board has not been converted to CONFIG_DM by the deadline.
Remove it. As this is the last armada100 platform, remove that support
as well.
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Sep 2021 13:09:31 +0000 (09:09 -0400)]
arm: Remove flea3 board
This board has not been converted to CONFIG_DM by the deadline.
Remove it. As this is the last mx35 platform, remove that support as
well.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Tom Rini [Fri, 1 Oct 2021 13:15:48 +0000 (09:15 -0400)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-marvell into next
- kwboot higher baudrate (Pali & Marek)
Marek Behún [Wed, 25 Aug 2021 12:49:39 +0000 (14:49 +0200)]
MAINTAINERS: Add entry for kwbimage / kwboot tools
Add entry for these tools with Marek, Pali and Stefan as maintainers.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Marek Behún [Fri, 24 Sep 2021 21:07:15 +0000 (23:07 +0200)]
doc/kwboot.1: Update man page
Update man page for the kwboot utility.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 24 Sep 2021 21:07:14 +0000 (23:07 +0200)]
tools: kwboot: Add Pali and Marek as authors
Add Pali and Marek as another authors of the kwboot utility.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 24 Sep 2021 21:07:13 +0000 (23:07 +0200)]
tools: kwboot: Update file header
Mention all supported platforms in file header.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 24 Sep 2021 21:07:12 +0000 (23:07 +0200)]
tools: kwboot: Avoid code repetition in kwboot_img_patch()
Change kwboot_img_patch() to avoid code repetition of setting errno to
EINVAL.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 24 Sep 2021 21:07:11 +0000 (23:07 +0200)]
tools: kwboot: Cosmetic fix
Add spaces around the | operator.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 24 Sep 2021 21:07:10 +0000 (23:07 +0200)]
tools: kwboot: Disable non-blocking mode
The kwboot utility does not handle EAGAIN / EBUSY errors, it expects
blocking mode on tty - it uses select() to check if data is available.
Disable non-blocking mode by clearing O_NDELAY flag which was set by
open().
We can't just take O_NDELAY from open(), because it is required there
until the CLOCAL flag is set on the tty.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>