From fdff4b3c489d683ab08d6453ac91af593ab07a2a Mon Sep 17 00:00:00 2001 From: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Date: Thu, 12 Oct 2023 15:58:21 +0200 Subject: [PATCH] arm64: dts: zynqmp: make hw-ecc as the default ecc mode Except for Linux no other component (i.e., u-boot, fsbl or BootRom) of the software stack supports software ecc engine. So, make hw-ecc as the default ecc mode. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f47b95616eb40d3a9908ca60df94ec6e873b071c.1697119098.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 23a3ff2fed..160c6c58b3 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -141,8 +141,7 @@ reg = <0x0>; #address-cells = <0x2>; #size-cells = <0x1>; - nand-ecc-mode = "soft"; - nand-ecc-algo = "bch"; + nand-ecc-mode = "hw"; nand-rb = <0>; label = "main-storage-0"; nand-ecc-step-size = <1024>; @@ -178,8 +177,7 @@ reg = <0x1>; #address-cells = <0x2>; #size-cells = <0x1>; - nand-ecc-mode = "soft"; - nand-ecc-algo = "bch"; + nand-ecc-mode = "hw"; nand-rb = <0>; label = "main-storage-1"; nand-ecc-step-size = <1024>; -- 2.39.5