Ovidiu Panait [Sat, 11 Mar 2023 17:38:36 +0000 (19:38 +0200)]
tools: relocate-rela: add support for handling 32-bit big endian files
Currently, a microblaze build with CONFIG_SYS_BIG_ENDIAN=y and
CONFIG_STATIC_RELA=y fails with:
tools/relocate-rela: Not supported machine type
ELF decoding failed
make[2]: *** [u-boot/Makefile:1306: u-boot-nodtb.bin] Error 1
To fix this, convert the 32-bit codepath to use the previously added
elf{16,32}_to_cpu() functions. The aarch64 codepath is left untouched.
This commit ensures that CI doesn't fail for the next patches which enable
runtime relocation by default for microblaze.
Reviewed-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230311173838.521804-3-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ovidiu Panait [Sat, 11 Mar 2023 17:38:35 +0000 (19:38 +0200)]
tools: relocate-rela: introduce elf16_to_cpu() and elf32_to_cpu()
Add elf16_to_cpu() and elf32_to_cpu() functions that allow to read data in
both big-endian and little-endian formats.
Reviewed-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230311173838.521804-2-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ovidiu Panait [Sat, 11 Mar 2023 17:38:34 +0000 (19:38 +0200)]
tools: relocate-rela: adjust le64_to_cpu -> le32_to_cpu in decode_elf32()
The sh_addr/sh_offset/sh_size fields in Elf32_Shdr are 32-bits wide, so
use le32_to_cpu() instead of the 64-bit variant.
Fixes: 5e0e1a86d327 ("tools: relocate-rela: Fix ELF decoding on big-endian hosts")
Reviewed-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230311173838.521804-1-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Algapally Santosh Sagar [Wed, 1 Mar 2023 10:33:34 +0000 (03:33 -0700)]
spl: Add missing prototype for board_boot_order
Add missing prototype to fix the sparse warning, warning: no
previous prototype for 'board_boot_order' [-Wmissing-prototypes].
Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230301103334.1455-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Algapally Santosh Sagar [Wed, 1 Mar 2023 10:33:33 +0000 (03:33 -0700)]
xilinx: zynqmp: Add missing prototype for zynqmp_mmio_write
Add missing prototype to fix the sparse warning, warning: no
previous prototype for 'zynqmp_mmio_write' [-Wmissing-prototypes].
Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230301103334.1455-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ashok Reddy Soma [Fri, 24 Feb 2023 05:07:09 +0000 (22:07 -0700)]
arm64: dts: zynqmp: Enable nand-on-flash-bbt in DT by default
By default enable nand-on-flash-bbt DT flag, so that driver always refers
to the bad block table(bbt) present on the flash device.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230224050709.30014-5-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ashok Reddy Soma [Fri, 24 Feb 2023 05:07:08 +0000 (22:07 -0700)]
arm64: dts: zynqmp: Fix nand dt node
DC3 nand node is not correct, it is showing all partitions under
controller node directly. Create two sub nand nodes with partitions for
each.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230224050709.30014-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ashok Reddy Soma [Fri, 24 Feb 2023 05:07:07 +0000 (22:07 -0700)]
mtd: nand: arasan: Set ofnode value
Ofnode value is not set, so all the DT properties are not being read
and due to this default values are being used.
Find nand node and set chip->flash_node value.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230224050709.30014-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ashok Reddy Soma [Fri, 24 Feb 2023 05:07:06 +0000 (22:07 -0700)]
mtd: nand: arasan: Remove hardcoded bbt option
Bad block table option is hardcoded to read from flash with
NAND_BBT_USE_FLASH option. This decision should be done based on DT
property. Remove this hardcoding, to be able to use DT property.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230224050709.30014-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Jiajie Chen [Mon, 27 Feb 2023 15:09:39 +0000 (23:09 +0800)]
spi: xilinx_spi: Fix spi reset
It was incorrectly using an old priv->regs pointer, which was
initialized to zero. SPI resets won't happen on first call.
Signed-off-by: Jiajie Chen <c@jia.je>
Link: https://lore.kernel.org/r/20230227150938.211820-1-c@jia.je
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Mon, 20 Feb 2023 08:09:04 +0000 (09:09 +0100)]
arm64: zynqmp: Remove comment about gem spec in kv260
The latest SOM specification doesn't enforce certain MIO lines allocated
for ethernet or ethernet controller itself. That's why remove comment about
it which is likely there from early version of specification.
Also removed the same comment from pinctrl node. It is clear that it has to
be defined for different carrier cards.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9406377bf2c391ac0200670511bd6b0edb097c96.1676880543.git.michal.simek@amd.com
Michal Simek [Wed, 15 Feb 2023 08:45:22 +0000 (09:45 +0100)]
xilinx: Enable SMC command for arm64 targets
SMC command is very useful for TF-A testing or issuing commands which are
not covered by any driver. Strongly recommend to disable this command on
any product unless it is required.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/23c77a2cbd083963ca17b84de4108dbb1f28597f.1676450712.git.michal.simek@amd.com
Michal Simek [Wed, 15 Feb 2023 08:45:21 +0000 (09:45 +0100)]
cmd: smccc: Print results in hex instead of dec
Printing return value in HEX instead of DEC. Return values are 64 bit
values which impossible to decode in DEC. For example getting CHIP ID in
dec is quite long.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9a0278a7da729cb69b7a4d46c5e7eb8c3217c635.1676450712.git.michal.simek@amd.com
Ilias Apalodimas [Thu, 16 Feb 2023 13:39:20 +0000 (15:39 +0200)]
arm64: zynqmp: Add an OP-TEE node to the device tree
Since the zynqmp boards can run upstream OP-TEE, and having the DT node
present doesn't cause any side effects add it in case someone tries to
load OP-TEE.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://lore.kernel.org/r/20230216133921.866786-1-ilias.apalodimas@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
Neal Frager [Tue, 14 Feb 2023 13:19:59 +0000 (13:19 +0000)]
fpga: zynqmppl: fix fpga loads command for unencrypted use case
When using the fpga loads command, the driver is passing the AES encryption
key address is all cases. However, for the authenticated, but not encrypted
use case, there is no AES encryption key, and this value is 0.
When AES encryption is not used on the fpga bitstream, the pmufw assumes that
the AES key address is a bitstream size value like what is used by the
unsecure fpga load command.
To fix the problem, this patch checks to see if the AES key address is zero.
If the AES key address is zero, it means that AES is not being used on the
bitstream and the bitstream size should be passed instead. Thus, matching
the fpga load functionality.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230214131959.40298-1-neal.frager@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Thu, 5 Jan 2023 08:40:32 +0000 (09:40 +0100)]
ARM: zynq: Comment interrupt names IRQs for pl330
pl330 DT yaml description doesn't define interrupt-names property that's
why comment it but keep it as comment.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8e5a921c16efe09030fda036340186c11dd990bf.1672908030.git.michal.simek@amd.com
Krzysztof Kozlowski [Sat, 30 Apr 2022 12:18:54 +0000 (14:18 +0200)]
ARM: dts: zynq-7000: drop useless 'dma-channels/requests' properties
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless. Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.
Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220430121902.59895-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:24 +0000 (17:53 -0700)]
ARM: dts: xilinx: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-31-krzysztof.kozlowski@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Thu, 5 Jan 2023 08:41:22 +0000 (09:41 +0100)]
ARM: zynq: Use recommended dma-controller name instead of dmac
Use standard name for dma controller. Issue is reported by dtbs_check as
dmac@
f8003000: $nodename:0: 'dmac@
f8003000' does not match
'^dma-controller(@.*)?$'
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5637d7e3464fbc1b2b269a7df35e24edc2c8d4ac.1672908080.git.michal.simek@amd.com
Michael Grzeschik [Sun, 23 Oct 2022 21:56:49 +0000 (23:56 +0200)]
arm64: zynqmp: Enable hs termination flag for USB dwc3 controller
Since we need to support legacy phys with the dwc3 controller,
we enable this quirk on the zynqmp platforms.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Link: https://lore.kernel.org/r/20221023215649.221726-1-m.grzeschik@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
Krzysztof Kozlowski [Fri, 25 Nov 2022 14:41:36 +0000 (15:41 +0100)]
arm64: dts: xilinx: align LED node names with dtschema
The node names should be generic and DT schema expects certain pattern:
xilinx/zynqmp-zcu100-revC.dtb: leds: 'vbus-det' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221125144136.477171-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Mon, 6 Feb 2023 12:50:00 +0000 (13:50 +0100)]
xilinx: dts: Remove cdns,zynq-gem
cdns prefix was deprecated and replaced by xlnx one in upstream Linux. Also
U-Boot driver has been updated to support new compatible string that's why
it is time to remove it and deprecate it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Algapally Santosh Sagar [Wed, 1 Feb 2023 09:55:53 +0000 (02:55 -0700)]
arm64: zynqmp: Add missing ZYNQMP_FIRMWARE dependencies
There are missing Kconfig dependencies in the code which is using
firmware interface.
The commit
71efd45a5fc7 ("arm64: zynqmp: Change firmware dependency")
add option to also disable ZYNQMP_FIRMWARE. But not all Kconfig
dependencies were properly described and also sdhci and gem drivers
didn't protect the code properly.
So, add the missing ZYNQMP_FIRMWARE dependencies.
Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230201095553.11219-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Tue, 7 Mar 2023 17:54:01 +0000 (12:54 -0500)]
Merge tag 'next-
20230307' of https://source.denx.de/u-boot/custodians/u-boot-video into next
- video console refactoring and optimization
- support for fonts wider than 1 byte
- use named header for 8x16 font data
- support multiple fonts configuration
- move get_font_size() to truetype driver ops
- support font size configuration at runtime
- add 16x32 Terminus font from linux
- add 12x22 Sun font from linux
- add 12x22 console simple font test
Tom Rini [Tue, 7 Mar 2023 15:42:22 +0000 (10:42 -0500)]
Merge branch '2023-03-06-assorted-platform-updates' into next
- semihosting updates for arm and riscv, assorted arm64 core updates,
assorted ast2600 updates, remove some more unused code, some TI K3
defconfig and DTS updates, uniphier DTS updates, mpc83xx Kconfig
cleanup, re-add fttmr010 driver with an update to use DM.
Dzmitry Sankouski [Tue, 7 Mar 2023 10:21:20 +0000 (13:21 +0300)]
video console: add 12x22 console simple font test
Tests fonts wider than a byte.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Tue, 7 Mar 2023 10:21:19 +0000 (13:21 +0300)]
video console: sandbox: add 12x22 font defconfigs
Add 12x22 font in order to write a test for it.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Mon, 27 Feb 2023 17:37:08 +0000 (20:37 +0300)]
video console: add 16x32 Terminus font from linux
Modern mobile phones typically have high pixel density.
Bootmenu is hardly readable on those with 8x16 font.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Mon, 27 Feb 2023 17:37:07 +0000 (20:37 +0300)]
video console: add 12x22 Sun font from linux
Modern mobile phones typically have high pixel density.
Bootmenu is hardly readable on those with 8x16 font.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Tue, 7 Mar 2023 10:21:16 +0000 (13:21 +0300)]
video console: allow font size configuration at runtime
Allow font size configuration at runtime for console_simple.c
driver. This needed for unit testing different fonts.
Configuring is done by `font` command, also used for font
selection in true type console.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Tue, 7 Mar 2023 10:21:15 +0000 (13:21 +0300)]
video console: move vidconsole_get_font_size() logic to driver ops
Since multiple vidconsole drivers exists, vidconsole_get_font_size()
implementation cannot longer live in vidconsole_uclass.c file.
Move current vidconsole_get_font_size logic to truetype driver ops.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Tue, 7 Mar 2023 10:21:14 +0000 (13:21 +0300)]
video console: implement multiple fonts configuration
This needed for unit testing different fonts.
Configured fonts are placed in an array of fonts.
First font is selected by default upon console probe.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[agust: fixed build error when bmp logo disabled]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Dzmitry Sankouski [Tue, 7 Mar 2023 10:21:13 +0000 (13:21 +0300)]
video console: move 8x16 font data in named header
Consistent font data header names needed to add new
fonts.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Tue, 7 Mar 2023 10:21:12 +0000 (13:21 +0300)]
video console: add support for fonts wider than 1 byte
Devices with high ppi may benefit from wider fonts.
Current width implementation is limited by 1 byte, i.e. 8 bits.
New version iterates VIDEO_FONT_BYTE_WIDTH times, to process all
width bytes, thus allowing fonts wider than 1 byte.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Tue, 7 Mar 2023 10:21:11 +0000 (13:21 +0300)]
video console: refactoring and optimization
- move common code to vidconsole_internal.h and console_core.c
- unite probe functions
- get rid of code duplications in switch across bpp values
- extract common pixel fill logic in two functions one per
horizontal and vertical filling
- rearrange statements in put_xy* methods in unified way
- replace types - uint*_t to u*
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Tue, 7 Feb 2023 15:21:05 +0000 (15:21 +0000)]
riscv: semihosting: replace inline assembly with assembly file
So far we used inline assembly to inject the actual instruction that
triggers the semihosting service. While this sounds elegant, as it's
really only about a few instructions, it has some serious downsides:
- We need some barriers in place to force the compiler to issue writes
to a data structure before issuing the trap instruction.
- We need to convince the compiler to actually fill the structures that
we use pointers to.
- We need a memory clobber to avoid the compiler caching the data in
those structures, when semihosting writes data back.
- We need register arguments to make sure the function ID and the
pointer land in the right registers.
This is all doable, but fragile and somewhat cumbersome. Since we now
have a separate function in an extra file anyway, we can do away with
all the magic and just write that in an actual assembler.
This is much more readable and robust.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Andre Przywara [Tue, 7 Feb 2023 15:21:04 +0000 (15:21 +0000)]
arm: semihosting: replace inline assembly with assembly file
So far we used inline assembly to inject the actual instruction that
triggers the semihosting service. While this sounds elegant, as it's
really only about one instruction, it has some serious downsides:
- We need some barriers in place to force the compiler to issue writes
to a data structure before issuing the trap instruction.
- We need to convince the compiler to actually fill the structures that
we use pointers to.
- We need a memory clobber to avoid the compiler caching the data in
those structures, when semihosting writes data back.
- We need register arguments to make sure the function ID and the
pointer land in the right registers.
This is all doable, but fragile and somewhat cumbersome. Since we now
have a separate function in an extra file anyway, we can do away with
all the magic and just write that in an actual assembly file.
This is much more readable and robust.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Devarsh Thakkar [Mon, 6 Feb 2023 11:34:51 +0000 (17:04 +0530)]
am62a7: dts: Enable full 4GB LPDDR4
AM62A7-SK board has 4GB LPDDR4 Micron MT53E2G32D4DE-046 AUT:B part
but only 2GB was enabled early.
Enable full 4GB memory by updating the latter 2GB memory region
which gets mapped to 0x0880000000 i.e. DDR16SS0_SDRAM as referred in
Table 2-1. AM62A Common SoC Memory of AM62Ax TRM [1].
[1] : https://www.ti.com/lit/zip/spruj16
Logs: https://gist.github.com/devarsht/
e85b6af89c01ddadb3a62f3e5f196af8
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Kunihiko Hayashi [Tue, 28 Feb 2023 02:37:09 +0000 (11:37 +0900)]
ARM: dts: uniphier: Sync DT with Linux v6.2
Synchronize devicetree sources with Linux v6.2.
- Use GIC interrupt definitions
- Add reg properties in USB-glue and SoC-glue node
- Fix node names to follow the generic names list in DT specification
- Add L2 cache and AHCI nodes
- Update nand and pcie nodes
- And some trivial fixes
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
Kunihiko Hayashi [Tue, 28 Feb 2023 02:37:08 +0000 (11:37 +0900)]
ARM: dts: uniphier: Switch USB node to the original
UniPhier DT applies its own USB node for U-Boot due to the USB driver
constrains. After solving this issue, u-boot allows the original USB node.
After switching USB node, synchronization of USB node with Linux becomes
possible.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
Christophe Leroy [Sun, 26 Feb 2023 09:44:09 +0000 (10:44 +0100)]
powerpc, mpc83xx: Remove CONFIG_ELBC_BRx_ORx
Commit
fe7d654d04 ("mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to
Kconfig") converted CONFIG_SYS_{BRx/ORx}_PRELIM to Kconfig by
implementing a fine-grained selection of every bit in Kconfig.
But commit
c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to
Kconfig") reworked it so that you now just have to provide the raw
value of each register in Kconfig. However, all fine-grained
Kconfig items remained allthough they are not used anymore.
Remove them all.
Fixes: c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Manorit Chawdhry [Fri, 24 Feb 2023 05:07:49 +0000 (10:37 +0530)]
configs: j7200: Merge HS and non-HS defconfigs
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Manorit Chawdhry [Fri, 24 Feb 2023 05:07:48 +0000 (10:37 +0530)]
configs: j721s2: merge HS and non-HS defconfigs
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Patrick Delaunay [Wed, 22 Feb 2023 19:19:59 +0000 (20:19 +0100)]
mmc: remove SDHCI SPEAR
As the file spear_sdhci.c file is already removed, delete the associated
configuration CONFIG_MMC_SDHCI_SPEAR.
Fixes: c942fc925e7dab ("mmc: spear: remove the entire spear_sdhci.c file")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 22 Feb 2023 19:19:58 +0000 (20:19 +0100)]
ARM: remove SPEAR entry in makefile
As the lastest spear directories are removed, delete the associated entry
in Makefile.
Fixes: 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Dylan Hung [Tue, 21 Feb 2023 13:01:10 +0000 (21:01 +0800)]
clk: ast2600: Keep PLL power on
According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Dylan Hung [Tue, 21 Feb 2023 13:01:09 +0000 (21:01 +0800)]
ram: ast2600: Keep MPLL power on
According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Marc Zyngier [Tue, 14 Feb 2023 13:38:14 +0000 (21:38 +0800)]
arm64: Reduce PT size estimation complexity
count_required_pts()'s complexity is high if mappings are not using the
largest possible block size (due to some other requirement such as tracking
dirty pages, for example).
Let's switch to a method that follows the pattern established with
the add_map() helper, and make it almost instantaneous instead of
taking a large amount of time if 2MB mappings are in use instead of
1GB.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the
upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/5d756d147e31a1cdaaa261a50e526404ca5968f5
Link: https://android.googlesource.com/platform/external/u-boot/+/6be9330601d81545c7c941e3609f35bf68a09059
Marc Zyngier [Tue, 14 Feb 2023 13:38:13 +0000 (21:38 +0800)]
arm64: Reduce add_map() complexity
In the add_map() function, for each level it populates, it iterates from
the root of the PT tree, making it ineficient if a mapping needs to occur
past level 1.
Instead, replace it with a recursive (and much simpler) algorithm
that keeps the complexity as low as possible. With this, mapping
512GB at level 2 goes from several seconds down to not measurable
on an A55 machine.
We keep the block mappings at level 1 for now though.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the
upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/96ad729cf4cab53bdff8222bb3eb256f38b5c3a6
Link: https://android.googlesource.com/platform/external/u-boot/+/6be9330601d81545c7c941e3609f35bf68a09059
Sergei Antonov [Mon, 13 Feb 2023 17:34:36 +0000 (20:34 +0300)]
timer: fttmr010: return a previously deleted driver now ported to DM
The fttmr010 timer driver was deleted by
commit
29fc6f24926e ("ARM: remove a320evb board support")
The original source file was: arch/arm/cpu/arm920t/a320/timer.c
Return the driver to the codebase in a DM compatible form.
A platform using fttmr010 will be submitted later.
This hardware is described in the datasheet [1], starting from page 348.
According to the datasheet, there is a Revision Register at offset 0x3C,
which is not present in 'struct fttmr010'. Add it and debug() print
revision in probe function.
[1]
https://bitbucket.org/Kasreyn/mkrom-uc7112lx/src/master/documents/FIC8120_DS_v1.2.pdf
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Ryan Chen [Fri, 10 Feb 2023 07:41:53 +0000 (15:41 +0800)]
configs: evb-ast2600: Enable configs to store env in SPI
Enable defconfigs relevant for storing env on SPI flash.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Pierre-Clément Tosi [Wed, 8 Feb 2023 20:54:28 +0000 (04:54 +0800)]
arm64: Initialize TLB memory if CMO_BY_VA_ONLY
Memory used to hold the page tables is allocated from the top of RAM
with no prior initialization and could therefore hold invalid data. As
invalidate_dcache_all() will be called before the MMU has been
initialized and as that function relies indirectly on the page tables
when using CMO_BY_VA_ONLY, these must be in a valid state from their
allocation.
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fix checkpatch warnings, and rebased
to the upstream. ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/e3ceef4230b772186c6853cace4a676a407e6ab7
Marc Zyngier [Wed, 8 Feb 2023 20:54:27 +0000 (04:54 +0800)]
arm: cpu: Add optional CMOs by VA
Exposing set/way cache maintenance to a virtual machine is unsafe, not
least because the instructions are not permission-checked but also
because they are not broadcast between CPUs. Consequently, KVM traps and
emulates such maintenance in the host kernel using by-VA operations and
looping over the stage-2 page-tables. However, when running under
protected KVM, these instructions are not able to be emulated and will
instead result in an exception being delivered to the guest.
Introduce CONFIG_CMO_BY_VA_ONLY so that virtual platforms can select
this option and perform by-VA cache maintenance instead of using the
set/way instructions.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <willdeacon@google.com>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. And fix some
checkpatch warnings. Rebased to upstream. ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/db5507f47f4f57f766d52f753ff2cc761afc213b
Link: https://android.googlesource.com/platform/external/u-boot/+/2baf54e743380a1e4a6bc2dbdde020a2e783ff67
Tom Rini [Fri, 3 Mar 2023 17:48:23 +0000 (12:48 -0500)]
Merge branch '2023-03-02-kconfig-and-CONFIG-cleanups' into next
- Partial merge of a series of mine to select some framework options
that shouldn't be prompted for (and remove some unused code related to
that), and a partial merge of a series from Simon to remove some dead
code and address various CONFIG_IS_ENABLED/IS_ENABLED issues in code.
Tom Rini [Fri, 3 Mar 2023 17:42:58 +0000 (12:42 -0500)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-usb into next
- MediaTek updates, correct logic on PHY selection for amlogic
Simon Glass [Wed, 22 Feb 2023 16:34:25 +0000 (09:34 -0700)]
command: Don't allow commands in SPL
At present we compile commands into U-Boot SPL even though they cannot
be used. This wastes space. Adjust the condition to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:24 +0000 (09:34 -0700)]
venice: Simplify conditions for network init
The conditions in this code do not align when doing an SPL build with
split config. Use __maybe_unused to avoid needing to be so explicit.
Of course a better solution would be to refactor all of this to avoid
using #ifdef.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:23 +0000 (09:34 -0700)]
power: wandboard: Add a missing CONFIG
We should enable pmic in SPL since it is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:22 +0000 (09:34 -0700)]
x86: coral: Add missing TPL options
Some options should be enabled which are missing. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:21 +0000 (09:34 -0700)]
dm: Add a TPL symbol for simple-bus
This is used in some x86 code, so add a symbol for it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:18 +0000 (09:34 -0700)]
net: Add an SPL config for atheros
Add a new SPL_PHY_ATHEROS to avoid a build error on am335x_evm with split
config.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Simon Glass [Wed, 22 Feb 2023 16:34:17 +0000 (09:34 -0700)]
imx: Use SATA instead of CMD_SATA
This causes a build failure on mx6cuboxi with split config, since CMD_SATA
shows up as enabled in SPl (because there is no SPL_CMD_SATA).
The condition is wrong anyway, so change it to use SATA instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:16 +0000 (09:34 -0700)]
freescale: Drop old pre-DM_ETH code
This is used by ls1021atwr_sdcard_ifc_SECURE_BOOT with split config, but
is not needed anymore, since Ethernet migration is complete. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:14 +0000 (09:34 -0700)]
Add VPL options for BLOBLIST
We can use this feature in VPL, so add some options for it. Also fix a
typo in the SPL help while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:12 +0000 (09:34 -0700)]
test: Tidy up sandbox handling in test-main
This is pretty messy at present since it relies on a SPL_SANDBOX option
that does not exist. Use the normal options instead, so that it will work
with split config.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:11 +0000 (09:34 -0700)]
lib: Add an SPL config for LIB_UUID
This is selected by PARTITION_UUIDS which has a separate option for SPL.
Add an SPL option for LIB_UUID also, so that we can keep them consistent.
Also add one for PARTITION_TYPE_GUID to avoid a build error in part_efi.c
which wants to call a uuid function in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:06 +0000 (09:34 -0700)]
sandbox: Tidy up I2C options
At present we enable the sandbox I2C driver for all builds. Add a separate
Kconfig option to control this, so that it can be disabled in TPL, where
it is not needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Wed, 22 Feb 2023 16:34:05 +0000 (09:34 -0700)]
sandbox: Use the generic VPL option to enable VPL
Avoid using CONFIG_SANDBOX_VPL since we have a generic option which works
just as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:04 +0000 (09:34 -0700)]
sandbox: Tidy up RTC options
At present we enable the sandbox RTC driver for all builds. Add a separate
Kconfig option to control this, so that it can be disabled in TPL, where
it is not needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:03 +0000 (09:34 -0700)]
lib: Fix build condition for tiny-printf
This should be checking for any SPL build. Drop the use of SPL_TPL_ since
it is not necessary and will not work with split config.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:01 +0000 (09:34 -0700)]
lib: Add VPL options for SHA1 and SHA256
Add these options so these algorithms can be used in VPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:34:00 +0000 (09:34 -0700)]
env: Allow VPL environment to be nowhere
Add an option to put the VPL environment nowhere (not in storage).
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:58 +0000 (09:33 -0700)]
bootstd: Correct 'VPL' typo
Correct a 'VPL' typo in the Kconfig.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:57 +0000 (09:33 -0700)]
event: Add Kconfig options for SPL
Add options to enable events in SPL. This is mostly so the code can be
excluded from SPL builds.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:56 +0000 (09:33 -0700)]
sandbox: Expand size for VPL image
Allow this to get larger to accommodate more test code with LTO disabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:54 +0000 (09:33 -0700)]
lib: Add a Kconfig for SPL_BZIP2
This is implicitly used in the source and seems useful, so add it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:53 +0000 (09:33 -0700)]
Correct SPL use of DM_RNG
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_DM_RNG defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:52 +0000 (09:33 -0700)]
boot: Add Kconfigs for BOOTMETH_VBE_REQUEST
Allow this to be enabled separately in U-Boot proper and in SPL, since
it is not needed in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:51 +0000 (09:33 -0700)]
Correct SPL uses of PHY_FIXED
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_PHY_FIXED defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:50 +0000 (09:33 -0700)]
Correct SPL use of PG_WCOM_UBOOT_UPDATE_SUPPORTED
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_PG_WCOM_UBOOT_UPDATE_SUPPORTED defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Simon Glass [Wed, 22 Feb 2023 16:33:49 +0000 (09:33 -0700)]
Correct SPL uses of MULTIPLEXER
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_MULTIPLEXER defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 22 Feb 2023 16:33:48 +0000 (09:33 -0700)]
Correct SPL uses of DISPLAY_AER_FULL
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_DISPLAY_AER_FULL defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:46 +0000 (09:33 -0700)]
bootstd: Disable QFW bootmeth in SPL
Move this Makefile line into the non-SPL area so we don't have to repy
on the SPL_TPL_ macro.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:44 +0000 (09:33 -0700)]
sh4: Drop unused twl6030 driver
This is not used. Drop the driver and Kconfig option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:43 +0000 (09:33 -0700)]
mtd: Drop unused CONFIG_ONENAND_U_BOOT
This option does not exist, so the Makefile rule does nothing. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 22 Feb 2023 16:33:42 +0000 (09:33 -0700)]
mtd: Drop unused kb9202_nand driver
This is not used since time out of mind.
Drop the driver and Kconfig option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Chunfeng Yun [Fri, 17 Feb 2023 09:04:12 +0000 (17:04 +0800)]
dt-bindings: usb: mtk-xhci: add support mt8195
Add a new compatible for mt8195 to add a workaround for hardware
issue.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Chunfeng Yun [Fri, 17 Feb 2023 09:04:11 +0000 (17:04 +0800)]
dt-bindings: phy-mtk-tphy: add support mt8195
Add a new compatible for mt8195 to add a workaround for hardware
issue.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Chunfeng Yun [Fri, 17 Feb 2023 09:04:10 +0000 (17:04 +0800)]
usb: xhci-mtk: modify the SOF/ITP interval for mt8195
There are 4 USB controllers on MT8195, the controllers (IP1~IP3,
exclude IP0) have a wrong default SOF/ITP interval which is
calculated from the frame counter clock 24Mhz by default, but
in fact, the frame counter clock is 48Mhz, so we shall set the
accurate interval according to 48Mhz for those controllers.
Note:
The first controller no need set it, but if set it, shall change
tphy's pll at the same time.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Chunfeng Yun [Fri, 17 Feb 2023 09:04:09 +0000 (17:04 +0800)]
phy: phy-mtk-tphy: add support mt8195
The T-PHY controller is designed to use use PLL integer mode, but
in fact use fractional mode for some ones on mt8195 by mistake,
this causes signal degradation (e.g. eye diagram test fail), fix
it by switching PLL to 26Mhz from default 48Mhz to improve signal
quality.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Chunfeng Yun [Fri, 17 Feb 2023 09:04:08 +0000 (17:04 +0800)]
phy: phy-mtk-tphy: remove macros to prepare bitfield value
Prefer to make use of FIELD_PREP() macro to prepare bitfield value,
then no need local macros anymore.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Marek Vasut [Thu, 23 Feb 2023 16:32:43 +0000 (17:32 +0100)]
usb: dwc3-meson-g12a: Select PHY instead of imply PHY
Imply means you can turn off the option and expect things to work
- "it's a good idea to have X enabled" is when to use imply
- "you must have X for Y to work" is when to use select
Use "select" here.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tom Rini [Thu, 16 Feb 2023 03:36:55 +0000 (22:36 -0500)]
s5p: Remove empty arch_misc_init
We don't need to provide an empty arch_misc_init function here, we can
just not enable the hook.
Cc: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Thu, 16 Feb 2023 03:36:54 +0000 (22:36 -0500)]
mvebu: Drop empty arch_misc_init
If this hooks is needed later, it should be added and populated for
real.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Thu, 16 Feb 2023 03:36:53 +0000 (22:36 -0500)]
mvebe: Drop ARCH_MISC_INIT from alleycat 5
In this platform, arch_misc_init doesn't perform any real function. The
call to get_soc_type_rev has no lasting side effects.
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Tom Rini [Thu, 16 Feb 2023 03:36:52 +0000 (22:36 -0500)]
imx9: Remove ARCH_MISC_INIT
We don't need an empty function, we can just not enable the hook we
don't use.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Thu, 16 Feb 2023 03:36:51 +0000 (22:36 -0500)]
common: Make ARCH_EARLY_INIT_R be selected only
As platforms which require this hook need this hook enabled, in order to
function, or do not need this hook, it doesn't make sense to prompt the
user. As all platforms that need this hook now select the symbol, remove
the prompt text.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 16 Feb 2023 03:36:50 +0000 (22:36 -0500)]
arm: rk3368: Select ARCH_EARLY_INIT_R when used
On the lion and evb-px5 platforms, we need this function, so select it.
Cc: Andy Yan <andy.yan@rock-chips.com>
Cc: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Tom Rini [Thu, 16 Feb 2023 03:36:49 +0000 (22:36 -0500)]
arm: zynq: Move to select'ing ARCH_EARLY_INIT_R if we have FPGA
The function arch_early_init_r only does anything on these platforms if
we have FPGA (or SPL and SPL_FPGA) enabled, so move the logic to select
based on that.
Cc: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 16 Feb 2023 03:36:48 +0000 (22:36 -0500)]
arm: mvebu: Add select on ARCH_EARLY_INIT_R if ARM64
We need to be calling arch_early_init_r() on 64bit mvebu platforms, so
move this to a select.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>