From ce8adf1a415b3027cc74c4e41e32cffad3e5ea40 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Date: Wed, 16 Nov 2022 07:11:54 -0700 Subject: [PATCH] spi: cadence-qspi: Fix compilation error in mini u-boot flash reset When cadence_qspi_versal_flash_reset() function is called in mini u-boot where there is no firmware support, it is missing defines for macro's BOOT_MODE_POR_0 & BOOT_MODE_POR_1. Remove them and replace with already define macro's which have same values as these. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20221116141155.14788-3-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> --- drivers/spi/cadence_ospi_versal.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index a9547a8200..e0d5e6b9e6 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -182,11 +182,11 @@ int cadence_qspi_versal_flash_reset(struct udevice *dev) /* set direction as output */ writel((readl(BOOT_MODE_DIR) | BIT(FLASH_RESET_GPIO)), - BOOT_MODE_POR_0); + BOOT_MODE_DIR); /* Data output enable */ writel((readl(BOOT_MODE_OUT) | BIT(FLASH_RESET_GPIO)), - BOOT_MODE_POR_1); + BOOT_MODE_OUT); /* IOU SLCR write enable */ writel(0, WPROT_PMC_MIO); -- 2.39.5