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3 years agoarm: socfpga: Get clock manager base address for Intel N5X device
Siew Chin Lim [Tue, 10 Aug 2021 03:26:31 +0000 (11:26 +0800)]
arm: socfpga: Get clock manager base address for Intel N5X device

Add N5X clock manager to socfpga_get_managers_addr function.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
3 years agodrivers: clk: Add clock driver for Intel N5X device
Siew Chin Lim [Tue, 10 Aug 2021 03:26:30 +0000 (11:26 +0800)]
drivers: clk: Add clock driver for Intel N5X device

Add clock manager driver for N5X. Provides clock initialization
and get_rate functions.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
3 years agoarm: socfpga: Add handoff data support for Intel N5X device
Tien Fong Chee [Tue, 10 Aug 2021 03:26:29 +0000 (11:26 +0800)]
arm: socfpga: Add handoff data support for Intel N5X device

N5X support both HPS handoff data and DDR handoff data.
Existing HPS handoff functions are restructured to support both existing
devices and N5X device.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
3 years agoarm: socfpga: Add base address for Intel N5X device
Siew Chin Lim [Tue, 10 Aug 2021 03:26:28 +0000 (11:26 +0800)]
arm: socfpga: Add base address for Intel N5X device

Reuse base_addr_soc64.h for Intel N5X device, the address is the
same as Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
3 years agoarm: socfpga: Changed base_addr_s10.h to base_addr_soc64.h
Siew Chin Lim [Tue, 10 Aug 2021 03:26:27 +0000 (11:26 +0800)]
arm: socfpga: Changed base_addr_s10.h to base_addr_soc64.h

Rename to common file name to used by all SOC64 devices and change
"_S10_" to "_SOC64_" in base_addr_soc64.h.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
3 years agoarm: socfpga: Move linux_qspi_enable from bootcommand to board_prep_linux function
Siew Chin Lim [Tue, 10 Aug 2021 03:26:26 +0000 (11:26 +0800)]
arm: socfpga: Move linux_qspi_enable from bootcommand to board_prep_linux function

Move 'linux_qspi_enable' from bootcommand to board_prep_linux function when
OS booted from FIT image for Stratix 10 and Agilex. This flow is common for
all Intel SOC64 devices.

U-Boot will update 'fdt_addr' environment value based on FIT image in
board_prep_linux function, and 'linux_qspi_enable' will refer to 'fdt_addr'
environment value to retrieve the device tree node.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
3 years agoMerge tag 'efi-2021-10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Mon, 23 Aug 2021 16:44:12 +0000 (12:44 -0400)]
Merge tag 'efi-2021-10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2021-10-rc3

Documentation:

* Rename Freescale to NXP
* Document structures used for the UEFI TCG2 protocol

UEFI:

* Device paths must use EfiBootServicesData

3 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Tom Rini [Mon, 23 Aug 2021 13:17:32 +0000 (09:17 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

fsl-qoriq: Fixes related to env, spi, usb, crypto, configs, distro-boot
for Layerscape Boards like lx2, sl28, ls2088ardb.
powerpc: Fixes for t208xrdb revd board and cortina related configs
update for T208xRDB, T4240RDB.

3 years agoMerge tag 'for-v2021.10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-i2c
Tom Rini [Mon, 23 Aug 2021 13:17:07 +0000 (09:17 -0400)]
Merge tag 'for-v2021.10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-i2c

i2c changes for for-v2021.10-rc3

new driver:
- Introduce mcp230xx support
  from Sebastian Reichel

new feature:
- i2c-gpio: add support for "sda-gpios" + "scl-gpios" i2c-gpio bindings.
  from Samuel Holland

- bootcount: add a new driver with syscon as backend
  from Nandor Han

3 years agoMerge branch '2021-08-21-assorted-changes'
Tom Rini [Sun, 22 Aug 2021 19:44:53 +0000 (15:44 -0400)]
Merge branch '2021-08-21-assorted-changes'

3 years agobootcount: add a new driver with syscon as backend
Nandor Han [Thu, 10 Jun 2021 12:40:38 +0000 (15:40 +0300)]
bootcount: add a new driver with syscon as backend

The driver will use a syscon regmap as backend and supports both
16 and 32 size value. The value will be stored in the CPU's endianness.

Signed-off-by: Nandor Han <nandor.han@vaisala.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoi2c: i2c-gpio: Support the named GPIO binding
Samuel Holland [Sun, 22 Aug 2021 00:25:43 +0000 (19:25 -0500)]
i2c: i2c-gpio: Support the named GPIO binding

To avoid confusion about the order of the GPIOs, the i2c-gpio binding
was updated to use a separate property for each GPIO instead of an
array. However, the driver only supports the old binding. Add support
for the new binding as well, so the driver continues to work as device
trees are updated.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
3 years agogpio: mcp230xx: Introduce new driver
Sebastian Reichel [Thu, 15 Jul 2021 15:40:00 +0000 (17:40 +0200)]
gpio: mcp230xx: Introduce new driver

Introduce driver for I2C based MCP230xx GPIO chips, which are
quite common and already well supported by the Linux kernel.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoi2c: add dm_i2c_reg_clrset
Sebastian Reichel [Thu, 15 Jul 2021 15:39:59 +0000 (17:39 +0200)]
i2c: add dm_i2c_reg_clrset

Add function to apply a bitmask to an i2c register, so
that specific bits can be cleared and/or set.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodisplay_options: Do not use %llu in print_size
Matwey V. Kornilov [Thu, 5 Aug 2021 21:22:58 +0000 (00:22 +0300)]
display_options: Do not use %llu in print_size

tiny-printf variant doesn't know how to handle %llu format string, but both
tiny-printf and print_size can meet in SPL when TFTP is used to obtain main
u-boot image. This is known to lead to critical boot issue at AM335x platform
when printf is catched in infinite loop.

To avoid such issues and make print_size function tiny-printf friendly, use %u
instead of %luu. Note, that the size value is guaranteed to be less than 1024
in this conditional branch, so the cast to unsigned int is safe.

Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agotiny-printf: Handle %pM format when CONFIG_SPL_NET_SUPPORT is enabled
Matwey V. Kornilov [Thu, 5 Aug 2021 19:06:05 +0000 (22:06 +0300)]
tiny-printf: Handle %pM format when CONFIG_SPL_NET_SUPPORT is enabled

%pM format string is used to print MAC-address and this is required while SPL
network boot.

This patch fixes the SPL boot issues like the following:

    Trying to boot from USB eth
    ## Error: flags type check failure for "ethaddr" <= "40309614M" (type: m)
    ## Error inserting "ethaddr" variable, errno=1
    eth0: eth_cpsw## Error: flags type check failure for "eth1addr" <=
    "81f01114M" (type: m)
    ## Error inserting "eth1addr" variable, errno=1
    , eth1: usb_ether
    eth_cpsw Waiting for PHY auto negotiation to complete......... TIMEOUT !
    Problem booting with BOOTP
    SPL: failed to boot from all boot devices
    ### ERROR ### Please RESET the board ###

Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoFix flashing of eMMC user area with Fastboot
Oleh Kravchenko [Wed, 19 May 2021 10:31:31 +0000 (13:31 +0300)]
Fix flashing of eMMC user area with Fastboot

'gpt' and 'mmc0' fastboot partitions have been treated as the same device,
but it is wrong.

Fill disk_partition structure with eMMC user partition info
to properly flash data.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Sean Anderson <sean.anderson@seco.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
3 years agoFix flash and erase of eMMC Boot2 with Fastboot
Oleh Kravchenko [Fri, 14 May 2021 21:06:21 +0000 (00:06 +0300)]
Fix flash and erase of eMMC Boot2 with Fastboot

The current U-Boot version has the next matches for boot partitions:
> mmc0boot0 to EMMC_BOOT1
> mmc0boot1 to EMMC_BOOT1 (should be EMMC_BOOT2)
This patch fixes a typo for the boot partition number.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
3 years agoclk: clk_versaclock: Add support for versaclock driver
Adam Ford [Fri, 4 Jun 2021 17:26:06 +0000 (12:26 -0500)]
clk: clk_versaclock: Add support for versaclock driver

The driver is based on the Versaclock driver from the Linux code, but
due differences in the clock API between them, some pieces had to be
changed.

This driver creates a mux, pfd, pll, and a series of fod ouputs.
 Rate               Usecnt      Name
------------------------------------------
 25000000             0        `-- x304-clock
 25000000             0            `-- clock-controller@6a.mux
 25000000             0                |-- clock-controller@6a.pfd
 2800000000           0                |   `-- clock-controller@6a.pll
 33333333             0                |       |-- clock-controller@6a.fod0
 33333333             0                |       |   `-- clock-controller@6a.out1
 33333333             0                |       |-- clock-controller@6a.fod1
 33333333             0                |       |   `-- clock-controller@6a.out2
 50000000             0                |       |-- clock-controller@6a.fod2
 50000000             0                |       |   `-- clock-controller@6a.out3
 125000000            0                |       `-- clock-controller@6a.fod3
 125000000            0                |           `-- clock-controller@6a.out4
 25000000             0                `-- clock-controller@6a.out0_sel_i2cb

A translation function is added so the references to <&versaclock X> get routed
to the corresponding clock-controller@6a.outX.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
3 years agoconfigs: lx2160a: load device-tree in RAM for distro boot
Priyanka Jain [Wed, 18 Aug 2021 07:07:03 +0000 (12:37 +0530)]
configs: lx2160a: load device-tree in RAM for distro boot

Update boot-commands to load device-tree from
boot-device at 'fdt_addr_r' address in DDR
during distro-boot.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Thu, 19 Aug 2021 12:23:01 +0000 (08:23 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv

3 years agocrypto/fsl: fix missed dma_addr_t -> caam_dma_addr_t conversion
Horia Geantă [Tue, 10 Aug 2021 14:12:19 +0000 (17:12 +0300)]
crypto/fsl: fix missed dma_addr_t -> caam_dma_addr_t conversion

One of the "dma_addr_t" instances was left out when
converting to "caam_dma_addr_t".

Fixes: 2ff17d2f74c5 ("crypto: fsl: refactor for 32 bit version CAAM support on ARM64")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: T4240rdb: Extend cs4340_get_fw_addr() functionality
Kuldeep Singh [Tue, 10 Aug 2021 05:50:11 +0000 (11:20 +0530)]
board: T4240rdb: Extend cs4340_get_fw_addr() functionality

T4240RDB supports booting from 2 nor banks(default and altbank). The
corresponding defconfig can only have one entry defined and therefore,
extend cs4340_get_fw_addr() function to overwrite firmware address which
will be later used in cortina firmware.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: t208x: Extend cs4340_get_fw_addr() functionality
Kuldeep Singh [Tue, 10 Aug 2021 05:50:10 +0000 (11:20 +0530)]
board: t208x: Extend cs4340_get_fw_addr() functionality

T2080RDB supports booting from 2 nor banks(default and altbank). The
corresponding defconfig can only have one entry defined and therefore,
extend cs4340_get_fw_addr() function to overwrite firmware address which
will be later used in cortina firmware.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: ls2088ardb: Extend cs4340_get_fw_addr() functionality
Kuldeep Singh [Tue, 10 Aug 2021 05:50:09 +0000 (11:20 +0530)]
board: ls2088ardb: Extend cs4340_get_fw_addr() functionality

LS2088A-RDB supports TFA boot source and has 2 nor banks(default and
altbank) and QSPI as boot source. The corresponding defconfig can only
have one entry defined and therefore, extend cs4340_get_fw_addr()
function to overwrite firmware address which will be later used in
cortina firmware.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agonet: cortina: Add support for tfa boot in cortina firmware
Kuldeep Singh [Tue, 10 Aug 2021 05:50:08 +0000 (11:20 +0530)]
net: cortina: Add support for tfa boot in cortina firmware

Add support for boards supporting TFA boot separately in cortina
firmware. Please note, a weak function is defined to retrieve firmware
address values as CONFIG_CORTINA_FW_ADDR is now defined in defconfig and
can only have one possible value defined. This weak function will help
in overwrting the values to get proper addresses as per boot source.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: Migrate CORTINA_FW_ADDR and CORTINA_FW_LENGTH to Kconfig
Kuldeep Singh [Tue, 10 Aug 2021 05:50:07 +0000 (11:20 +0530)]
configs: Migrate CORTINA_FW_ADDR and CORTINA_FW_LENGTH to Kconfig

Use moveconfig.py script to convert below defines to Kconfig and move
these entries to defconfigs.
    CONFIG_CORTINA_FW_ADDR
    CONFIG_CORTINA_FW_LENGTH

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoenv: Kconfig: Add default option for PHY_CORTINA
Kuldeep Singh [Tue, 10 Aug 2021 05:50:06 +0000 (11:20 +0530)]
env: Kconfig: Add default option for PHY_CORTINA

Add PHY_CORTINA as default option in SYS_MMC_ENV_DEV Kconfig entry as
PHY_CORTINA require SYS_MMC_ENV_DEV value similar to FMAN_ENET or QE.
This helps in resolving compilation failure.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarmv8: fsl : create bootcmd and mcinitcmd as per boot source
Wasim Khan [Mon, 2 Aug 2021 08:34:52 +0000 (10:34 +0200)]
armv8: fsl : create bootcmd and mcinitcmd as per boot source

NXP platforms expect custom bootcmd and mcinitcmd to be
updated as per boot source with default environment.
Check env variable fsl_bootcmd_mcinitcmd_set to prepare
bootcmd and mcinitcmd

Fixes: cbf77d201870 (armv8: fsl-layerscape: Fix automatic
setting of bootmcd with TF-A)

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: fsl_validate: Fix resource leak issue
Kshitiz Varshney [Sun, 1 Aug 2021 12:31:45 +0000 (14:31 +0200)]
board: fsl_validate: Fix resource leak issue

Free dynamically allocated memory before every return statement
in calc_img_key_hash() and calc_esbchdr_esbc_hash() function.
Verified the secure boot changes using ls1046afrwy board.

Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: freescale: t208xrdb: enable Power-On Reset for rev D boards
Camelia Groza [Thu, 29 Jul 2021 16:31:20 +0000 (19:31 +0300)]
board: freescale: t208xrdb: enable Power-On Reset for rev D boards

Starting with board revision D, the MISCCSR CPLD register needs to be
configured to enable Power-on Reset for software reset commands.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agolx2160a: Enable CONFIG_SPI_FLASH_MT35XU for lx2160a-rdb/qds
Kuldeep Singh [Wed, 28 Jul 2021 08:35:59 +0000 (14:05 +0530)]
lx2160a: Enable CONFIG_SPI_FLASH_MT35XU for lx2160a-rdb/qds

LX2160A-RDB/QDS has micron mt35xu512aba flash which requires flag
CONFIG_SPI_FLASH_MT35XU on to probe flash successfully.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: sl28: drop unneeded and outdated flash partitions
Michael Walle [Mon, 26 Jul 2021 20:08:44 +0000 (22:08 +0200)]
board: sl28: drop unneeded and outdated flash partitions

This board doesn't use the MTD subsystem in u-boot, thus there is no
need to specify the partitions. They are outdated anyway. Just drop
them.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm: Finish migration of HAS_FSL_XHCI_USB
Tom Rini [Wed, 21 Jul 2021 22:53:20 +0000 (18:53 -0400)]
arm: Finish migration of HAS_FSL_XHCI_USB

This symbol was largely migrated, except for one case.  Update it.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agospi: nxp_fspi: Ensure width is respected in spi-mem operations
Michael Walle [Mon, 26 Jul 2021 19:35:28 +0000 (21:35 +0200)]
spi: nxp_fspi: Ensure width is respected in spi-mem operations

Import linux commit 007773e16a6f ("spi: nxp-fspi: Ensure width is
respected in spi-mem operations") to fix SPI access on boards which
don't have all SPI I/O lines connected to the flash.

Since commit 71025f013ccb ("mtd: spi-nor-core: Rework hwcaps selection")
u-boot figures out the capabilities by looking at spi_mem_supports_op().
The FlexSPI driver doesn't take the board layout into account. Fix that.

Fixes: 383fded70c4f ("spi: nxp_fspi: new driver for the FlexSPI controller")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoefi_loader: use EfiBootServicesData for DP to text
Heinrich Schuchardt [Tue, 17 Aug 2021 14:15:34 +0000 (16:15 +0200)]
efi_loader: use EfiBootServicesData for DP to text

Memory allocated in the implementation of the
EFI_DEVICE_PATH_TO_TEXT_PROTOCOL must be of type EfiBootServicesData.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
3 years agoefi_loader: use EfiBootServicesData for device path
Heinrich Schuchardt [Tue, 17 Aug 2021 13:15:23 +0000 (15:15 +0200)]
efi_loader: use EfiBootServicesData for device path

dp_alloc() was using a constant from the wrong enum resulting in creating
device paths in EfiReservedMemory.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
3 years agoefi_loader: use correct type for AllocatePages, AllocatePool
Heinrich Schuchardt [Tue, 17 Aug 2021 13:05:31 +0000 (15:05 +0200)]
efi_loader: use correct type for AllocatePages, AllocatePool

Use enum efi_memory_type and enum_allocate_type in the definitions of the
efi_allocate_pages(), efi_allocate_pool().

In the external UEFI API leave the type as int as the UEFI specification
explicitely requires that enums use a 32bit type.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
3 years agoefi_loader rename enum efi_mem_type to efi_memory_type
Heinrich Schuchardt [Tue, 17 Aug 2021 13:02:23 +0000 (15:02 +0200)]
efi_loader rename enum efi_mem_type to efi_memory_type

Use the same name as in the UEFI specification to avoid confusion.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
3 years agoefi_loader: use an enum for the memory allocation types
Heinrich Schuchardt [Tue, 17 Aug 2021 12:52:16 +0000 (14:52 +0200)]
efi_loader: use an enum for the memory allocation types

For type checking we need an enum.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
3 years agoefi_loader: add comment for efi_tcg2.h
Masahisa Kojima [Fri, 13 Aug 2021 07:12:43 +0000 (16:12 +0900)]
efi_loader: add comment for efi_tcg2.h

This commit adds the comment of the TCG Specification
efi_tcg2.h file refers, and comment for the structure.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: move doc/board/st/st.rst
Heinrich Schuchardt [Mon, 16 Aug 2021 17:46:38 +0000 (19:46 +0200)]
doc: move doc/board/st/st.rst

'make htmldocs' does not use file doc/board/st/st.rst because the name
matches the directory name. Let's rename it to st-dt.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: rename Freescale to NXP
Heinrich Schuchardt [Mon, 16 Aug 2021 06:18:37 +0000 (08:18 +0200)]
doc: rename Freescale to NXP

Freescale Semiconductor, Inc. was merged into NXP Semiconductors in 2015.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: move i.MX7D/i.MX8MM A/B booting to board specific
Heinrich Schuchardt [Mon, 16 Aug 2021 05:54:10 +0000 (07:54 +0200)]
doc: move i.MX7D/i.MX8MM A/B booting to board specific

Having "i.MX7D/i.MX8MM SRC_GPR10 PERSIST_SECONDARY_BOOT for bootloader A/B
switching" at the top level of the documentation tree does not make sense.
Move it to board specific information.

Fixes: 59e3d1bd4992 ("doc: imx: psb: Document usage of SRC_GPR10 PERSIST_SECONDARY_BOOT for A/B switching")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-tegra
Tom Rini [Tue, 17 Aug 2021 13:39:22 +0000 (09:39 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-tegra

3 years agoboard: sifive: overwrite board_fdt_blob_setup in u-boot proper
Zong Li [Tue, 27 Jul 2021 09:06:59 +0000 (17:06 +0800)]
board: sifive: overwrite board_fdt_blob_setup in u-boot proper

Add board_fdt_blob_setup to return the device tree location which is
passed by prior stage in u-boot proper. The generic board_fdt_blob_setup
always returns _end, it mignt be ok because u-boot SPL would currently
put the dtb there, but it would be broken if we put the dtb to another
place and assigned the location into a1 register for u-boot proper. Use
the location passed by prior stage would make more sence, because we
actually pass the location to u-boot proper and want to use that one,
rather than the dtb which in _end.

We can't use CONFIG_OF_PRIOR_STAGE because it doens't distinguish the
implementation of u-boot SPL and u-boot proper, so u-boot SPL need to
reply on the prior stage to pass device tree location as well, but we
don't pass the DT from boot rom now. In addition, when
CONFIG_OF_PRIOR_STAGE is enabled, the u-boot-spl.bin and u-boot.itb won't
include the device tree.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoboard: sifive: compile stuff only related to SPL in SPL build
Zong Li [Tue, 27 Jul 2021 09:06:58 +0000 (17:06 +0800)]
board: sifive: compile stuff only related to SPL in SPL build

As (3581811dc26f "riscv: sifive/fu540: Move SPL related functions to spl.c"),
we put the SPL stuff in spl.c, we don't need to compile unleashed.c and
unmatched.c in SPL build.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoriscv: cpu: fu740: Fix typo of date
Zong Li [Mon, 2 Aug 2021 07:34:14 +0000 (15:34 +0800)]
riscv: cpu: fu740: Fix typo of date

Fixed the typo of date of copyright declaration.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoqemu-riscv64_smode: fix extlinux (define preboot)
Dimitri John Ledkov [Mon, 26 Jul 2021 10:20:17 +0000 (11:20 +0100)]
qemu-riscv64_smode: fix extlinux (define preboot)

Commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to
Kconfig") removed preboot commands in RISC-V targets and broke
extlinux support as reported by Fu Wei <wefu@redhat.com>.

The patch finishes migration of CONFIG_USE_PREBOOT and CONFIG_REBOOT
to Kconfig.

Fixes: 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to Kconfig")
Reported-By: Fu Wei <wefu@redhat.com>
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Signed-off-by: Dimitri John Ledkov <dimitri.ledkov@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 years agoboard: apalis-tk1: launch toradex easy installer in usb recovery
Marcel Ziswiler [Wed, 11 Aug 2021 13:12:56 +0000 (15:12 +0200)]
board: apalis-tk1: launch toradex easy installer in usb recovery

The USB recovery mode is used by Toradex to load the Toradex Easy
Installer image which supports further system images installation.
Prepare for loading and launching the Toradex Easy Installer if the
USB Recovery mode is activated.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoPrepare v2021.10-rc2
Tom Rini [Mon, 16 Aug 2021 18:18:45 +0000 (14:18 -0400)]
Prepare v2021.10-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoconfigs: Resync with savedefconfig
Tom Rini [Mon, 16 Aug 2021 13:35:24 +0000 (09:35 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Mon, 16 Aug 2021 13:31:00 +0000 (09:31 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-stm

Highlights:
  - Handle TF-A boot with FIP for STM32MP1
  - Fix board_get_usable_ram_top(0) for STM32MP1
  - DT alignement with kernel v5.14 for STM32MP1
  - SPI-NOR DT update for DHSOM
  - Add UCLASS API for ECDSA singnature and implement it for STM32MP1

3 years agotest: dm: Add test for ECDSA UCLASS support
Alexandru Gagniuc [Thu, 29 Jul 2021 16:47:19 +0000 (11:47 -0500)]
test: dm: Add test for ECDSA UCLASS support

This test verifies that ECDSA_UCLASS is implemented, and that
ecdsa_verify() works as expected. The definition of "expected" is
"does not find a device, and returns -ENODEV".

The lack of a hardware-independent ECDSA implementation prevents us
from having one in the sandbox, for now.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoKconfig: FIT_SIGNATURE should not select RSA_VERIFY
Alexandru Gagniuc [Thu, 29 Jul 2021 16:47:18 +0000 (11:47 -0500)]
Kconfig: FIT_SIGNATURE should not select RSA_VERIFY

FIT signatures can now be implemented with ECDSA. The assumption that
all FIT images are signed with RSA is no longer valid. Thus, instead
of 'select'ing RSA, only 'imply' it. This doesn't change the defaults,
but allows one to explicitly disable RSA support.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoarm: stm32mp1: Implement ECDSA signature verification
Alexandru Gagniuc [Thu, 29 Jul 2021 16:47:17 +0000 (11:47 -0500)]
arm: stm32mp1: Implement ECDSA signature verification

The STM32MP ROM provides several service. One of them is the ability
to verify ecdsa256 signatures. Hook the ROM API into the ECDSA uclass.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agolib: ecdsa: Implement UCLASS_ECDSA verification on target
Alexandru Gagniuc [Thu, 29 Jul 2021 16:47:16 +0000 (11:47 -0500)]
lib: ecdsa: Implement UCLASS_ECDSA verification on target

Implement the crypto_algo .verify() function for ecdsa256. Because
it backends on UCLASS_ECDSA, this change is focused on parsing the
keys from devicetree and passing this information to the specific
UCLASS driver.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agodm: crypto: Define UCLASS API for ECDSA signature verification
Alexandru Gagniuc [Thu, 29 Jul 2021 16:47:15 +0000 (11:47 -0500)]
dm: crypto: Define UCLASS API for ECDSA signature verification

Define a UCLASS API for verifying ECDSA signatures. Unlike
UCLASS_MOD_EXP, which focuses strictly on modular exponentiation,
the ECDSA class focuses on verification. This is done so that it
better aligns with mach-specific implementations, such as stm32mp.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoARM: dts: stm32: Reduce DHCOR SPI NOR frequency to 50 MHz
Marek Vasut [Mon, 9 Aug 2021 12:06:04 +0000 (14:06 +0200)]
ARM: dts: stm32: Reduce DHCOR SPI NOR frequency to 50 MHz

The SPI NOR is a bit further away from the SoC on DHCOR than on DHCOM,
which causes additional signal delay. At 108 MHz, this delay triggers
a sporadic issue where the first bit of RX data is not received by the
QSPI controller.

There are two options of addressing this problem, either by using the
DLYB block to compensate the extra delay, or by reducing the QSPI bus
clock frequency. The former requires calibration and that is overly
complex for SPL, so opt for the second option. This incurs 20ms delay
during boot, when SPL loads U-Boot to DRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agoARM: stm32: Set environment sector size to 4k on DHSOM
Marek Vasut [Mon, 9 Aug 2021 12:08:11 +0000 (14:08 +0200)]
ARM: stm32: Set environment sector size to 4k on DHSOM

The DHSOM SPI NOR is using 4k erase blocks, make use of it
and define the default environment sector size to 4k.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agoarm: dts: stm32mp15: alignment with v5.14
Patrick Delaunay [Tue, 27 Jul 2021 10:15:12 +0000 (12:15 +0200)]
arm: dts: stm32mp15: alignment with v5.14

Device tree alignment with Linux kernel v5.14-rc3
- ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15
- ARM: dts: stm32: Configure qspi's mdma transfer to block for stm32mp151
- ARM: dts: stm32: add a new DCMI pins group on stm32mp15
- ARM: dts: stm32: fix ltdc pinctrl on microdev2.0-of7

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agostm32mp: correctly handle board_get_usable_ram_top(0)
Patrick Delaunay [Mon, 26 Jul 2021 09:55:27 +0000 (11:55 +0200)]
stm32mp: correctly handle board_get_usable_ram_top(0)

The function board_get_usable_ram_top can be called after relocation
with total_size = 0 to get the uppermost pointer that is valid to access
in U-Boot.

When total_size = 0, the reserved memory should be not take in account
with lmb library and 'gd->ram_base + gd->ram_size' can be used.

It is the case today in lib/efi_loader/efi_memory.c:efi_add_known_memory()
and this patch avoids that the reserved memory for OP-TEE is not part of
the EFI available memory regions.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agostm32mp1: stm32prog: remove stm32prog_get_tee_partitions with FIP
Patrick Delaunay [Mon, 26 Jul 2021 09:21:38 +0000 (11:21 +0200)]
stm32mp1: stm32prog: remove stm32prog_get_tee_partitions with FIP

The MTD tee partitions used to save the OP-TEE binary are needed when
TF-A doesn't use the FIP container to load binaries.

This patch puts under CONFIG_STM32MP15x_STM32IMAGE flag the associated
code in U-Boot binary and prepare the code cleanup when
CONFIG_STM32MP15x_STM32IMAGE support will be removed after TF-A migration
to FIP support.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agodoc: st: stm32mp1: Add FIP support for trusted boot
Patrick Delaunay [Mon, 26 Jul 2021 09:21:37 +0000 (11:21 +0200)]
doc: st: stm32mp1: Add FIP support for trusted boot

TF-A for STM32MP15 now supports the FIP: it is a packaging format which
includes the secure monitor, u-boot-nodtb.bin and u-boot.dtb

This FIP file is loaded by FSBL = TF-A BL2.

This patch updates the board documentation to use this FIP file and no
more u-boot.stm32 (with STM32 image header) which is no more generated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agoarm: stm32mp: add defconfig for trusted boot with FIP
Patrick Delaunay [Mon, 26 Jul 2021 09:21:36 +0000 (11:21 +0200)]
arm: stm32mp: add defconfig for trusted boot with FIP

Add TF-A FIP support for trusted boot on STM32MP15x,
when STM32MP15x_STM32IMAGE is not activated.

With FIP support the SSBL partition is named "fip" and its size is 4MB,
so the ENV partition name in device tree  (for SD card or eMMC)
or offset in defconfig (CONFIG_ENV_OFFSET / CONFIG_ENV_OFFSET_REDUND)
need to be modified.

With FIP the TEE MTD partitions are removed because the OP-TEE binray are
included in the FIP containers.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agoarm: stm32mp: handle the OP-TEE nodes in DT with FIP support
Patrick Delaunay [Mon, 26 Jul 2021 09:21:35 +0000 (11:21 +0200)]
arm: stm32mp: handle the OP-TEE nodes in DT with FIP support

With FIP support in TF-A (when CONFIG_STM32MP15x_STM32IMAGE
is not activated), the DT nodes needed by OP-TEE are added by OP-TEE
firmware in U-Boot device tree, present in FIP.

These nodes are only required in trusted boot, when TF-A load the file
u-boot.stm32, including the U-Boot device tree with STM32IMAGE header,
in this case OP-TEE can't update the U-Boot device tree.

Moreover in trusted boot mode with FIP, as the OP-TEE nodes are present
in U-Boot device tree only when needed the function
stm32_fdt_disable_optee can be removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agoarm: stm32mp: add config for STM32IMAGE support
Patrick Delaunay [Mon, 26 Jul 2021 09:21:34 +0000 (11:21 +0200)]
arm: stm32mp: add config for STM32IMAGE support

By default for trusted boot with TF-A, U-Boot (u-boot-nodtb)
is located in FIP container with its device tree and with
the secure monitor (provided by TF-A or OP-TEE).
The FIP file is loaded by TF-A BL2 and each components is
extracted at the final location.

This patch add CONFIG_STM32MP15x_STM32IMAGE to request the
STM32 image generation for SOC STM32MP15x
when FIP container is not used (u-boot.stm32 is loaded by TF-A
as done previously to keep the backward compatibility).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agoclk: stm32mp1: add support of BSEC clock
Patrick Delaunay [Fri, 16 Jul 2021 08:10:55 +0000 (10:10 +0200)]
clk: stm32mp1: add support of BSEC clock

Add the support of the BSEC clock used by the STM32MP misc driver
since the commit 622c956cada0 ("stm32mp: bsec: manage clock when present
in device tree") even if this clock is not yet defined in kernel device
tree stm32mp151.dtsi.

This patch avoids issue for basic boot when this secure clock are not
provided by secure world with SCMI.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
3 years agoMerge tag 'efi-2021-10-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sun, 15 Aug 2021 17:42:42 +0000 (13:42 -0400)]
Merge tag 'efi-2021-10-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2021-10-rc2-2

Documentation:

* Require Sphinx >= 2.4.4 for 'make htmldocs'
* Move devicetree documentation to restructured text and update it
* Document stm32mp1 devicetree bindings

UEFI

* Extend measurement to UEFI variables and ExitBootServices()
* Support Uri() node in devicetree to text protocol
* Add Linux magic token to RISC-V EFI test binaries

3 years agoefi_loader: refactor efi_append_scrtm_version()
Masahisa Kojima [Fri, 13 Aug 2021 07:12:42 +0000 (16:12 +0900)]
efi_loader: refactor efi_append_scrtm_version()

Refactor efi_append_scrtm_version() to use common
function for adding eventlog and extending PCR.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
3 years agoefi_loader: add ExitBootServices() measurement
Masahisa Kojima [Fri, 13 Aug 2021 07:12:41 +0000 (16:12 +0900)]
efi_loader: add ExitBootServices() measurement

TCG PC Client PFP spec requires to measure
"Exit Boot Services Invocation" if ExitBootServices() is invoked.
Depending upon the return code from the ExitBootServices() call,
"Exit Boot Services Returned with Success" or "Exit Boot Services
Returned with Failure" is also measured.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Swap two ifs in efi_exit_boot_services().
efi_tcg2_notify_exit_boot_services must have EFIAPI signature.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: add boot variable measurement
Masahisa Kojima [Fri, 13 Aug 2021 07:12:40 +0000 (16:12 +0900)]
efi_loader: add boot variable measurement

TCG PC Client PFP spec requires to measure "Boot####"
and "BootOrder" variables, EV_SEPARATOR event prior
to the Ready to Boot invocation.
Since u-boot does not implement Ready to Boot event,
these measurements are performed when efi_start_image() is called.

TCG spec also requires to measure "Calling EFI Application from
Boot Option" for each boot attempt, and "Returning from EFI
Application from Boot Option" if a boot device returns control
back to the Boot Manager.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
3 years agoefi_loader: add secure boot variable measurement
Masahisa Kojima [Fri, 13 Aug 2021 07:12:39 +0000 (16:12 +0900)]
efi_loader: add secure boot variable measurement

TCG PC Client PFP spec requires to measure the secure
boot policy before validating the UEFI image.
This commit adds the secure boot variable measurement
of "SecureBoot", "PK", "KEK", "db", "dbx", "dbt", and "dbr".

Note that this implementation assumes that secure boot
variables are pre-configured and not be set/updated in runtime.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
3 years agoefi_loader: add Linux magic to RISC-V crt0
Heinrich Schuchardt [Fri, 28 May 2021 20:24:37 +0000 (22:24 +0200)]
efi_loader: add Linux magic to RISC-V crt0

Add the Linux magic to the EFI file header to allow running our test
programs with GRUB's linux command.

MajorImageVersion = 1 indicates a kernel that can consume the
EFI_LOAD_FILE2_PROTOCOL. This allows to dump the GRUB provided intird with
our initrddump.efi tool.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: Uri() device path node
Heinrich Schuchardt [Thu, 5 Aug 2021 21:10:05 +0000 (21:10 +0000)]
efi_loader: Uri() device path node

iPXE used Uri() device path nodes. So we should support them in the
device path to text protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: stm32mp1: add page for device tree bindings
Patrick Delaunay [Mon, 2 Aug 2021 16:08:36 +0000 (18:08 +0200)]
doc: stm32mp1: add page for device tree bindings

With device tree binding migration to yaml it is difficult to synchronize
the binding from Linux kernel to U-Boot.

Instead of maintaining the same dt bindings, this patch adds in the U-Boot
documentation the path to the device tree bindings in Linux kernel for
STMicroelectronics devices, when they are used without modification.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add links for referenced text files.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: Add a note about why devicetree is used
Simon Glass [Mon, 2 Aug 2021 00:57:12 +0000 (18:57 -0600)]
doc: Add a note about why devicetree is used

This question comes up every now and then with people coming from Linux.
Add some notes about it so we can point to it in the mailing list.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: Update devicedocs including how to add tweaks
Simon Glass [Mon, 2 Aug 2021 00:57:11 +0000 (18:57 -0600)]
doc: Update devicedocs including how to add tweaks

This file is about 10 years old and the updates have not covered
everything that has changed, particularly in the last few years. Update
the information and add mention of the u-boot.dtsi files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fix typos.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: Move devicetree control doc to rST
Simon Glass [Mon, 2 Aug 2021 00:57:10 +0000 (18:57 -0600)]
doc: Move devicetree control doc to rST

Move this to rST format, largely unchanged to start with. Add an index
for this topic, as well as an empty intro.

Note this patch does not include updates! Is it just a conversion to the
new format. See the next patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchart <xypron.glpk@gmx.de>
3 years agodoc: fix Latex margins
Heinrich Schuchardt [Thu, 5 Aug 2021 18:18:06 +0000 (20:18 +0200)]
doc: fix Latex margins

Adjust the Latex formatting to match Linux v5.13.1:

* add Latex margins
* reformat the code in doc/conf.py to match Linux

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: require Sphinx 2.4.4
Heinrich Schuchardt [Thu, 5 Aug 2021 18:13:41 +0000 (20:13 +0200)]
doc: require Sphinx 2.4.4

Require Sphinx 2.44 to build the documentation.
Remove all code related to earlier versions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: add pkg-config to the build dependencies
Heinrich Schuchardt [Mon, 2 Aug 2021 20:10:04 +0000 (22:10 +0200)]
doc: add pkg-config to the build dependencies

tools/Makefile uses pkg-config.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Fri, 13 Aug 2021 12:37:47 +0000 (08:37 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-x86

- Enable SeaBIOS support for Crown Bay
- Update SeaBIOS build instructions in the x86 doc
- Enable CONFIG_SPI_FLASH_SMART_HWCAPS for Crown Bay

3 years agox86: crownbay: Enable CONFIG_SPI_FLASH_SMART_HWCAPS
Bin Meng [Wed, 4 Aug 2021 03:53:39 +0000 (11:53 +0800)]
x86: crownbay: Enable CONFIG_SPI_FLASH_SMART_HWCAPS

Now that the spi-nor fix has been made in u-boot/master via:

  commit 87e7219f9c6a ("mtd: spi-nor: Respect flash's hwcaps in spi_nor_adjust_hwcaps()")

enable CONFIG_SPI_FLASH_SMART_HWCAPS on Intel Crown Bay again.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodoc: x86: Update SeaBIOS build instructions
Bin Meng [Tue, 3 Aug 2021 12:50:04 +0000 (20:50 +0800)]
doc: x86: Update SeaBIOS build instructions

Update SeaBIOS build instructions using exact command that involves
"make olddefconfig", and mention SeaBIOS release 1.14.0 has been
used for testing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agox86: crownbay: Enable SeaBIOS support
Bin Meng [Tue, 3 Aug 2021 12:50:03 +0000 (20:50 +0800)]
x86: crownbay: Enable SeaBIOS support

Enable SeaBIOS support for any kernel that requires legacy BIOS
services.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoMerge tag 'u-boot-rockchip-20210812' of https://source.denx.de/u-boot/custodians...
Tom Rini [Thu, 12 Aug 2021 13:33:39 +0000 (09:33 -0400)]
Merge tag 'u-boot-rockchip-20210812' of https://source.denx.de/u-boot/custodians/u-boot-rockchip

- Add Rockchip SFC driver support;
- DTS sync from kernel;
- emmc hs400 support for rk3399;
- Fix for spinore bootdevice and MMC boot order;

3 years agorockchip: px30: Support configure SFC
Jon Lin [Thu, 5 Aug 2021 08:27:53 +0000 (16:27 +0800)]
rockchip: px30: Support configure SFC

Make px30 SFC clock configurable

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: px30: add support for SFC for Odroid Go Advance
Chris Morgan [Thu, 5 Aug 2021 08:27:52 +0000 (16:27 +0800)]
rockchip: px30: add support for SFC for Odroid Go Advance

The Odroid Go Advance uses a Rockchip Serial Flash Controller with an
XT25F128B SPI NOR flash chip. This adds support for both. Note that
while both the controller and chip support quad mode, only two lines
are connected to the chip. Changing the pinctrl to bus2 and setting tx
and rx lines to 2 for this reason.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agomtd: spi-nor-ids: Add XTX XT25F128B
Chris Morgan [Thu, 5 Aug 2021 08:26:41 +0000 (16:26 +0800)]
mtd: spi-nor-ids: Add XTX XT25F128B

Adds support for XT25F128B used on Odroid Go Advance. Unfortunately
this chip uses a continuation code which I cannot seem to parse, so
there are possibly going to be collisions with chips that use the same
manufacturer/ID.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: px30: add the serial flash controller
Chris Morgan [Thu, 5 Aug 2021 08:26:40 +0000 (16:26 +0800)]
rockchip: px30: add the serial flash controller

Add the serial flash controller to the devicetree for the PX30.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: px30: Add support for using SFC
Chris Morgan [Thu, 5 Aug 2021 08:26:39 +0000 (16:26 +0800)]
rockchip: px30: Add support for using SFC

This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agospi: rockchip_sfc: add support for Rockchip SFC
Chris Morgan [Thu, 5 Aug 2021 08:26:38 +0000 (16:26 +0800)]
spi: rockchip_sfc: add support for Rockchip SFC

This patch adds support for the Rockchip serial flash controller
found on the PX30 SoC. It should work for versions 3-5 of the SFC
IP, however I am only able to test it on v3.

This is adapted from the WIP SPI-MEM driver for the SFC on mainline
Linux. Note that the main difference between this and earlier versions
of the driver is that this one does not support DMA. In testing
the performance difference (performing a dual mode read on a 128Mb
chip) is negligible. DMA, if used, must also be disabled in SPL
mode when using A-TF anyway.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agorockchip: Fix u-boot-rockchip.bin build
Johan Gunnarsson [Sun, 25 Jul 2021 14:25:58 +0000 (16:25 +0200)]
rockchip: Fix u-boot-rockchip.bin build

Currently there are a few arm32 rockchip board configs that don't
generate u-boot-rockchip.bin when running make because CONFIG_BINMAN
is not enabled. This patch changes CONFIG_ARCH_ROCKCHIP to also select
CONFIG_BINMAN if CONFIG_SPL and !CONFIG_ARM64.

Example builds that don't generate u-boot-rockchip.bin without this
patch:

export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make kylin-rk3036_defconfig
make

export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make rock_defconfig
make

export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make tinker-rk3288_defconfig
make

Signed-off-by: Johan Gunnarsson <johan.gunnarsson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agoarm: dts: sync the Rockhip 3368 SoCs from Linux
Peter Robinson [Thu, 22 Jul 2021 15:20:44 +0000 (16:20 +0100)]
arm: dts: sync the Rockhip 3368 SoCs from Linux

Sync the rk3368 DTs and associated bits from 5.14-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agoarm: dts: sync the Rockhip 3328 SoCs from Linux
Peter Robinson [Thu, 22 Jul 2021 15:20:43 +0000 (16:20 +0100)]
arm: dts: sync the Rockhip 3328 SoCs from Linux

Sync the rk3328 DTs and associated bits from 5.14-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
3 years agoarm: dts: sync the Rockhip 3399 SoCs from Linux
Peter Robinson [Thu, 22 Jul 2021 15:20:42 +0000 (16:20 +0100)]
arm: dts: sync the Rockhip 3399 SoCs from Linux

Sync the rk3399 DTs and associated bits from 5.14-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
(Remove the conflict content for vmarc-som)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-cfi-flash
Tom Rini [Wed, 11 Aug 2021 12:31:56 +0000 (08:31 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-cfi-flash

- Some CFI flash related fixups (Kconfig & header) (Bin)
- Enable CFI flash support on the QEMU RISC-V virt machine. (Bin)

3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Wed, 11 Aug 2021 12:31:25 +0000 (08:31 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- Convert GoFlex Home Ethernet and SATA to Driver Model (Tony)
- mvebu: Automatically detect CONFIG_SYS_TCLK (Pavel)
- mvebu: sata_mv: Fix HDD identication during cold start (Tony)
- a37xx: pci: Fix handling PIO config error responses (Pavel)
- Other minor misc changes and board maintainer updates

3 years agoMerge tag 'u-boot-amlogic-20210810' of https://source.denx.de/u-boot/custodians/u...
Tom Rini [Wed, 11 Aug 2021 12:31:13 +0000 (08:31 -0400)]
Merge tag 'u-boot-amlogic-20210810' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- odroid-n2: fix fdtfile suffix for n2-plus
- sei610 & meson64_android cleanups to prepare android 11 boot support
- use Android BCB mechanism for reboot reason instead of HW reboot flag
- Switch meson64_android boot flow to use abootimg for A/B, AVB and DTBO support