Alexander Dahl [Fri, 21 Jun 2024 07:47:20 +0000 (09:47 +0200)]
doc: develop: testing: Fix reference to test writing section
Add missing colon in :doc: link.
Fixes: fc3283314539 ("doc: Explain briefly how to write new tests") Signed-off-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Alexander Dahl [Fri, 21 Jun 2024 07:47:19 +0000 (09:47 +0200)]
doc: develop: testing: Fix broken reference to pytest suite help
This should have been adapted directly with or after v2021.01-693-gca6583d4e08 ("doc: move test/README to HTML
documentation") or v2021.01-694-g0157619d5c8 ("doc: move
test/py/README.md to HTML documentation") already.
Signed-off-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Fri, 19 Apr 2024 22:03:09 +0000 (00:03 +0200)]
ARM: dts: stm32: Ping IWDG on exit from PSCI suspend code
Make sure the OS would not get any spurious IWDG pretimeout IRQ
right after the system wakes up. This may happen in case the SoC
got woken up by another source than the IWDG pretimeout and the
pretimeout IRQ arrived immediately afterward, but too late to be
handled by the suspend main loop. In case either of the IWDG is
enabled, ping it first and then return to the OS.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Ravi Minnikanti [Sat, 27 Apr 2024 16:15:28 +0000 (09:15 -0700)]
mtd: nand: pxa3xx: Incorrect bitflip return on page read
Once a page is read with higher bitflips all subsequent reads
are returning the same bitflip value even though they have none.
max_bitflip variable is not being reset to 0 across page reads.
This is causing problems like incorrectly
marking erase blocks bad by UBI and causing read failures.
Verified the change with both MTD reads and UBI.
This change is inline with other NFC drivers.
Sample error log where a block is marked bad incorrectly:
ubi0: fixable bit-flip detected at PEB 125
ubi0: run torture test for PEB 125
ubi0: fixable bit-flip detected at PEB 125
ubi0 error: torture_peb: read problems on freshly erased PEB 125,
must be bad
ubi0 error: erase_worker: failed to erase PEB 125, error -5
ubi0: mark PEB 125 as bad
Link: https://lore.kernel.org/all/ea0422cd-a8e6-3c36-f551-a0142893301b@marvell.com Signed-off-by: rminnikanti <rminnikanti@marvell.com> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: rminnikanti <rminnikanti@marvell.com> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Tom Rini [Sun, 16 Jun 2024 15:10:53 +0000 (09:10 -0600)]
Merge tag 'efi-2024-07-rc5-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2024-07-rc5-2
Documentation:
* Correct links and board names in PHYTEC board descriptions.
* Describe UEFI measured boot.
* Fix typos in include/bootmeth.h.
* Fix link reference to general verified boot docs.
Ilias Apalodimas [Fri, 14 Jun 2024 12:09:50 +0000 (15:09 +0300)]
tpm: measure DTB in PCR1 instead of PCR0
The PC client spec [0], doesn't describe measurements for DTBs. It does
describe what do to for ACPI tables though.
There is a description for ACPI in 3.3.4.1 PCR[0] – SRTM, POST BIOS,
and Embedded Drivers and they explicitly mention ACPI in there. There's
no mention of ACPI in 3.3.4.2 PCR[1] – Host Platform Configuration.
However, in Figure 6 -- PCR Mapping of UEFI Components ACPI is shown
in PCR1. The general description also mentions PCR0 is for code and PCR1
is for data such as ACPI and SMBIOS.
So let's switch over the DTB measurements to PCR1 which seems a better
fit.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Eddie James <eajames@linux.ibm.com>
Daniel Schultz [Wed, 12 Jun 2024 16:16:38 +0000 (09:16 -0700)]
doc: board: phytec: phycore-am64x: Fix Link to Documentation
We moved our documentation to another hoster and therefore the URL
changed. Point to the latest documentation instead of release versions
to not link out-dated documentation.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Daniel Schultz [Wed, 12 Jun 2024 16:16:37 +0000 (09:16 -0700)]
doc: board: phytec: phycore-am62x: Fix Link to Documentation
We moved our documentation to another hoster and therefore the URL
changed. Point to the latest documentation instead of release versions
to not link out-dated documentation.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
board: imx8mn_s2: Update timing with production one
The timing upstream was wrong corresponding to the production.
This come evident after commit b614ddb5d33
(ddr: imx: Save the FW loading if it hasn't changed). This
change fix booting from usb
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Marek Vasut [Thu, 6 Jun 2024 13:02:46 +0000 (15:02 +0200)]
ARM: stm32: Fix livetree conversion on STM32MP15xx DHSOM
Unlike fdt_node_check_compatible() which returns 0 if node is compatible,
ofnode_device_is_compatible() return true which is non-zero if node is
compatible. The intention of the code is to exit from the function in
case the node is not compatible with "micrel,ks8851-mll". Add the missing
invert into the conditional to reinstate original behavior.
This exposes a follow up problem caused by conversion to DM based FMC2 EBI
driver, where the FMC2 EBI is not configured when accessed by this code.
Probe the KS8851 MAC, which also configures the FMC2 EBI as a dependency,
so that the KS8851 MAC CCR register can be accessed over the FMC2 EBI bus
and checked for EEPROM present bit.
Fixes: 5a605b7c8615 ("board: dhelectronics: stm32mp1: convert to livetree") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Quentin Schulz [Thu, 6 Jun 2024 11:44:04 +0000 (13:44 +0200)]
rockchip: mkimage: fix mkimage -l for header v1
There are two paths to reach this function, either through mkimage -l or
through dumpimage -l. The latter passes a NULL imagename while the
former passes an empty string. Therefore, let's make both tools behave
the same by handling the empty string the same way as for NULL.
Without this, the only way to get some information out of mkimage -l is
to provide "-n rk3399" for example, which isn't documented in the usage
of the tool.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 12 May 2024 12:16:15 +0000 (12:16 +0000)]
pinctrl: rockchip: rv1126: Fix support for IOMUX_L_SOURCE_PMU flag
GPIO0_C0-C4 iomux is set using PMUGRF_GPIO0C_IOMUX_L reg on RV1126. This
is indicated using the IOMUX_L_SOURCE_PMU flag. Fix reading current mux
by fully adopting the IOMUX_L_SOURCE_PMU related code in Linux kernel.
Based on Linux commit fd4ea48688c6 ("pinctrl: rockchip: Add RV1126
pinctrl support").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 12 May 2024 12:16:14 +0000 (12:16 +0000)]
pinctrl: rockchip: rk3188: Fix support for IOMUX_GPIO_ONLY flag
GPIO0_A0-A7 on RK3188 is IOMUX_GPIO_ONLY, however, trying to set gpio
mux return an -ENOTSUPP error code. Fix this by validating using the mux
function type and not the iomux flag.
Based on Linux commit c4a532dee6b6 ("pinctrl: rockchip: handle first
half of rk3188-bank0 correctly").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Wed, 5 Jun 2024 09:33:21 +0000 (11:33 +0200)]
regulator: rk8xx: fix incorrect device used for _ldo_[sg]et_suspend_value
_ldo_get_suspend_value and _ldo_set_suspend_value get passed the parent
of the regulator (so the pmic) as first argument, therefore this udevice
should be used for pmic_* callbacks instead of using the parent of the
pmic.
To avoid further confusion, let's rename the argument to pmic instead of
dev, highlighting which kind of device we expect as argument.
Fixes: f047e4ab9762 ("regulator: rk8xx: add indirection level for some ldo callbacks") Reported-by: Simon Glass <sjg@chromium.org> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # chromebook-bob
Chris Morgan [Tue, 21 May 2024 15:45:49 +0000 (10:45 -0500)]
board: rockchip: rgxx3: Use sdmmc0 as first device
Some of the rgxx3 devices do not have a way to recover from a poor
flash of a bootloader to eMMC. Set the device to always attempt to boot
from sdmmc0 first which ensures that we can override the boot from
emmc if we have a card present with a valid fit signature. The
expectation is that this will protect from the very unlikely chance
we have a valid FIT signature on the eMMC but the U-Boot stage fails
for some other reason.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On some of the supported devices the adc detect code always returns
that the button has been pushed, and as a result the device will
not boot normally.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Mon, 10 Jun 2024 16:11:44 +0000 (18:11 +0200)]
cmd: sound: fix help text
There's never been a -q or -s argument handled in the command, so let's
remove it. This was highlighted during review[1] but somehow still got
through.
While at it, slightly "reword" in the help text how the len + freq
arguments are defined. Indeed, len and freq work in pair, it is possible
to define none of either, n of both, or n - 1 of freq if there are n
len, in which case the freq that goes with the last len would be the n -
1 (and not the default of 400Hz if neither len nor freq is passed). I
assume this isn't what's expected but leaving it for another patch if
need be to fix what happens in that very odd scenario.
Tom Rini [Thu, 6 Jun 2024 16:44:25 +0000 (10:44 -0600)]
doc/sphinx, test/py: Update requests module to 2.32.2
The issue described in https://github.com/psf/requests/pull/6655 has
been assigned as a security issue. While unlikely to be exploited in our
usage, update to the current release to fix it. Furthermore, upstream
has now moved on to v2.23.2 as the release to use which has all of the
issues resolved.
Reported-by: GitHub dependabot Signed-off-by: Tom Rini <trini@konsulko.com>
According to UEFI v2.10 spec section 8.2.6, if a caller invokes the
SetVariables() service, it will produce a digest from hash(VariableName,
VendorGuid, Attributes, TimeStamp, DataNew_variable_content), then the
firmware that implements the SetVariable() service will compare the
digest with the result of applying the signer’s public key to the
signature. For EFI variable append write, efitools sign-efi-sig-list has
an option "-a" to add EFI_VARIABLE_APPEND_WRITE attr, and u-boot will
drop this attribute in efi_set_variable_int(). So if a caller uses
"sign-efi-sig-list -a" to create the authenticated variable, this append
write will fail in the u-boot due to "hash check failed".
This patch resumes writing the EFI_VARIABLE_APPEND_WRITE attr to ensure
that the hash check is correct. And also update the "test_efi_secboot"
test case to compliance with the change.
Fiona Klute [Sat, 18 May 2024 10:47:05 +0000 (12:47 +0200)]
doc: Detailed example for netconsole setup
This adds details that I would have liked to have readily available,
in particular how to activate the network interface before enabling
netconsole, and how to integrate netconsole so you can use the U-Boot
prompt.
Signed-off-by: Fiona Klute <fiona.klute@gmx.de> Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Neil Armstrong [Tue, 28 May 2024 08:35:03 +0000 (10:35 +0200)]
usb: dwc3: gadget: fix crash in dwc3_gadget_giveback()
If the ep0 stalls or request are dequeued when gagdet is stopped,
the request dma may not be mapped yet and dwc3_flush_cache() may be
called with a NULL pointer.
Check req->request.dma before calling dwc3_flush_cache() and later
the usb_gadget_unmap_request() functions since it means that
usb_gadget_map_request() hasn't been called yet.
Adam Ford [Sat, 1 Jun 2024 14:55:20 +0000 (09:55 -0500)]
configs: rzg2_beacon: Realign ENV location and offset
The ENV size and offset were changed to different
values in Beacon's downstream release. Change them to the
same values as the downstream for consistent behavior.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Adam Ford [Sat, 1 Jun 2024 14:55:19 +0000 (09:55 -0500)]
renesas: beacon-rzg2m: Add Marek to MAINTAINER file
Since any changes to the RZ/G2 family go through Marek's tree,
update the MAINTAINER file to automatically show his name
when running get_maintainer.pl. Without this, he is not
copied.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 19 May 2024 20:40:07 +0000 (22:40 +0200)]
ARM: dts: renesas: Reserve space in 64bit R-Car DTs
Reserve 4 kiB of space in 64bit R-Car DTs when those DTs are compiled
to permit patching in OpTee-OS /firmware node, /reserved-memory node,
possibly also additional /memory@ nodes and RPC node by TFA.
This duplicates behavior in arch/arm/dts/Makefile with OF_UPSTREAM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tom Rini [Thu, 30 May 2024 13:07:51 +0000 (07:07 -0600)]
Merge patch series "omap3: igep0x00: Fix boot failure and modernize the boards support"
Javier Martinez Canillas <javier@dowhile0.org> says:
Hello,
I noticed that the IGEPv2 board did not boot anymore with mainline U-Boot.
This was caused by a driver change to allocate its platform data before
relocation and U-Boot not having enough pre-relocation heap size for this.
This series fixes this issue and also makes the board support more modern,
by enabling DM for SPL and migrating the IGEP boards to use upstream DTBs.
The IGEPv2 board boot started to fail since the commit afd4f15a39de ("spi:
omap3_spi: Read platform data in ofdata_to_platdata()"). Because this made
the OMAP3 SPI controller driver to allocate its platform data before doing
a relocation, but the igep0x00 config sets this pool size to just 1 KiB.
Increase the pre-relocation malloc heap size to 16 KiB, as is set by other
OMAP3 boards. This not only restores booting but also makes it consistent.
Leave the SPL pool size to the previous 1 KiB size since 16 KiB may not be
a possible size in that constrained environment and is also the value that
is set by other OMAP3 boards.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
H Bell [Wed, 22 May 2024 19:12:51 +0000 (19:12 +0000)]
board: starfive: support Pine64 Star64 board
Add documentation files
Signed-off-by: Henry Bell <dmoo_dv@protonmail.com> Cc: ycliang@andestech.com Cc: heinrich.schuchardt@canonical.com Reviewed-by: E Shattow <lucent@gmail.com>
H Bell [Wed, 22 May 2024 19:12:48 +0000 (19:12 +0000)]
board: starfive: support Pine64 Star64 board
Similar to the Milk-V Mars, The Star64 board contains few differences to the
VisionFive 2 boards, so can be part of the same U-boot build.
Signed-off-by: Henry Bell <dmoo_dv@protonmail.com> Cc: ycliang@andestech.com Cc: heinrich.schuchardt@canonical.com Reviewed-by: E Shattow <lucent@gmail.com>
Conor Dooley [Wed, 15 May 2024 15:04:31 +0000 (16:04 +0100)]
board: microchip: icicle: make both ethernets optional
A given AMP configuration for a board may make either one, or neither
of, the ethernet ports available to U-Boot. The Icicle's init code will
fail if mac1 is not present, so move it to the optional approach taken
for mac0.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Conor Dooley [Wed, 15 May 2024 15:04:30 +0000 (16:04 +0100)]
board: microchip: icicle: correct type for node offset
Node offsets returned by libfdt can contain negative error numbers, so
the variable type should be "int". As things stand, if the ethernet
nodes are not found in the early init callback, the if (node < 0) tests
pass and the code errors out while trying to set the local-mac-address
for a non-existent node.
Quentin Schulz [Fri, 24 May 2024 11:46:36 +0000 (13:46 +0200)]
migrate Theobroma Systems mail addresses to CHERRY Embedded Solutions
See
https://embedded.cherry.de/theobroma-systems-is-now-officially-part-of-cherry-se/
While the mail addresses on the theobroma-systems.com domain should be
redirect to cherry.de, let's anticipate IT hiccups and avoid important
mails not reaching us by swapping the domain name wherever appropriate
for the newer one.
Christoph Mueller isn't working at ~Theobroma~ CHERRY Embedded Solutions
anymore, but I don't know his new mail address so mails destined to him
will keep bouncing.
Cc: Heiko Stuebner <heiko.stuebner@cherry.de> <heiko.stuebner@theobroma-systems.com> Cc: Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de> Cc: Klaus Goger <klaus.goger@cherry.de> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Bryan Brattlof [Thu, 23 May 2024 16:43:20 +0000 (11:43 -0500)]
arm: mach-k3: am62p: Fixup TF-A/OP-TEE reserved-memory node in FDT
The address we load TFA and OPTEE is configurable by the
CONFIG_K3_{ATF,OPTEE)_LOAD_ADDR, but the DT node reservations remain
static which can cause some confusion about where exactly these firmware
are exactly. Fix this by updating the reserved-memory{} nodes when the
loaded address does not match the address in DT.
Reported-by: Andrew Davis <afd@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com>
Sam Protsenko [Sat, 25 May 2024 21:51:38 +0000 (16:51 -0500)]
arm: dts: e850-96: Remove not needed bootph-all flags
Most of the nodes in e850-96 appended device tree that add bootph-all
flags are not necessary. All those nodes are instantiated as
dependencies of other nodes anyway. Remove those nodes to avoid
cluttering the appended dts. 'bdinfo' reports 768 bytes reduction for
"Early malloc usage", and 'dm tree' output doesn't change. Keep only
pmu_system_controller changes, which are actually needed for serial to
work properly.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Sat, 25 May 2024 21:18:36 +0000 (16:18 -0500)]
arm: exynos: Migrate E850-96 board to OF_UPSTREAM
Use upstream device tree files and bindings. To do so:
- imply (enable) OF_UPSTREAM option for E850-96 target
- point DEFAULT_DEVICE_TREE in E850-96 config to upstream dts
- remove now not needed local dts files, binding docs and headers
- update MAINTAINERS and board/samsung/e850-96/MAINTAINERS
correspondingly
Upstream device tree files for Exynos850 SoC and E850-96 board are
pretty much the same as local (removed) ones, so the conversion is
rather straightforward and painless in this case. The appended dts file
(arch/arm/dts/exynos850-e850-96-u-boot.dtsi) stays unchanged.
The only remaining local dt-bindings doc for E850-96 board is
exynos-pmu.yaml. It wasn't removed as it's quite different from Linux
kernel version. Particularly U-Boot local version of exynos-pmu.yaml
describes "samsung,uart-debug-1" property, which is not present in Linux
kernel binding. Later it might be upstreamed to Linux kernel, and once
it's done the U-Boot exynos-pmu.yaml binding can be removed.
No functional change.
Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Tim Harvey [Sat, 25 May 2024 20:00:49 +0000 (13:00 -0700)]
tpm-v2: allow algorithm name to be configured for pcr_read and pcr_extend
For pcr_read and pcr_extend commands allow the digest algorithm to be
specified by an additional argument. If not specified it will default to
SHA256 for backwards compatibility.
Additionally update test_tpm2.py for the changes in output in pcr_read
which now shows the algo and algo length in the output.
A follow-on to this could be to extend all PCR banks with the detected
algo when the <digest_algo> argument is 'auto'.
Tim Harvey [Wed, 15 May 2024 23:21:38 +0000 (16:21 -0700)]
tpm: display warning if using gpio reset with TPM
Instead of displaying what looks like an error message if a
gpio-reset dt prop is missing for a TPM display a warning that
having a gpio reset on a TPM should not be used for a secure production
device.
TCG TIS spec [1] says:
"The TPM_Init (LRESET#/SPI_RST#) signal MUST be connected to the
platform CPU Reset signal such that it complies with the requirements
specified in section 1.2.7 HOST Platform Reset in the PC Client
Implementation Specification for Conventional BIOS."
The reasoning is that you should not be able to toggle a GPIO and reset
the TPM without resetting the CPU as well because if an attacker can
break into your OS via an OS level security flaw they can then reset the
TPM via GPIO and replay the measurements required to unseal keys
that you have otherwise protected.
Additionally restructure the code for improved readability allowing for
removal of the init label.
Before:
- board with no reset gpio
u-boot=> tpm init && tpm info
tpm_tis_spi_probe: missing reset GPIO
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
- board with a reset gpio
u-boot=> tpm init && tpm info
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
After:
- board with no reset gpio
u-boot=> tpm init && tpm info
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
- board with a reset gpio
u-boot=> tpm init && tpm info
tpm@1: TPM gpio reset should not be used on secure production devices
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
Chris Morgan [Fri, 24 May 2024 16:48:00 +0000 (11:48 -0500)]
board: rockchip: Add Indiedroid Nova
The Indiedroid Nova is a Rockchip RK3588S based SBC from Indiedroid.
Specifications:
Rockchip RK3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
Optional eMMC
2x USB 2.0, 2x USB 3.0, 1x USB 3.0 C port with DP Alt
1x MIPI-CSI Port (4-lane or 2x 2-lane)
1x MIPI-DSI 4-lane connector
1x Micro HDMI 2.1 output, 1x DP 1.4 output
Gigabit Ethernet
Realtek RTL8821CS WiFi
4 pin debug UART connector
40 pin GPIO header
Size: 85mm x 56mm (Raspberry Pi Form Factor)
Kernel commit: 3900160e164b ("arm64: dts: rockchip: Add Indiedroid Nova board")
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Tue, 21 May 2024 15:25:33 +0000 (10:25 -0500)]
board: rockchip: add Powkiddy X55
The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device.
UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this
successfully boots mainline Linux.
Quentin Schulz [Thu, 23 May 2024 16:59:36 +0000 (18:59 +0200)]
rockchip: ringneck_px30: Use common bss and stack addresses
U-Boot proper pre-reloc is currently running out of memory and it is
thus impossible to boot into U-Boot CLI.
Fix this by migrating to the common bss and stack addresses for PX30,
which drastically increases the size of the pre-reloc allocation pool (8
times bigger now). The memory layout in SPL and U-Boot proper now
match the other SoCs' using ROCKCHIP_COMMON_STACK_ADDR.
Quentin Schulz [Thu, 23 May 2024 16:59:35 +0000 (18:59 +0200)]
rockchip: Use common bss and stack addresses on PX30
See commit 008ba0d56d00 ("rockchip: Add common default bss and stack
addresses") for memory layout. This migrates PX30 to use the new layout,
except for TPL. Indeed, PX30 is extremely limited in SRAM, so we need to
be extra careful about what goes into the TPL and how much we can
allocate there, so let's keep the current value for
TPL_SYS_MALLOC_F_LEN (already present in the PX30-specific Kconfig, from
an earlier commit).
This will allow us to use the same memory layout on one more Rockchip
SoC, which is always a nice thing. Additionally, this will make it
easier to fix U-Boot proper pre-reloc running out of memory on PX30 in a
subsequent commit.
Quentin Schulz [Thu, 23 May 2024 16:59:34 +0000 (18:59 +0200)]
rockchip: px30: default TPL_SYS_MALLOC_F_LEN to 0x600 on PX30 Kconfig level
This is the kind of setting that typically doesn't need to be changed
between boards based on the same SoC, so let's make it the default in
PX30 Kconfig so we don't have to care about it in the defconfig if we
don't want to.
Heiko Stuebner [Wed, 22 May 2024 17:31:29 +0000 (19:31 +0200)]
clk: rockchip: rk3588: Set SPLL frequency during SPL stage
All parts expect the SPLL to run at 702MHz. In U-Boot it's the SPLL_HZ
declaring this rate and in the kernel it's a fixed clock definition.
While everything is expecting 702MHz, the SPLL is not running that
frequency when coming from the bootrom though, instead it's running
at 351MHz and the vendor-u-boot just sets it to the expected frequency.
The SPLL itself is located inside the secure-BUSCRU and in theory
accessible as an SCMI clock, though this requires an unknown amount
of cooperation from trusted-firmware to set at a later stage, though
during the SPL stage we can still access the relevant CRU directly.
The SPLL is for example necessary for the DSI controllers to produce
output.
As the SPLL is "just" another rk3588 pll, just set the desired rate
directly during the SPL stage.
Tested on rk3588-rock5b and rk3588-tiger by reading back the PLL rate
and also observing working DSI output with this change.
Fixes: 6737771600d4 ("rockchip: rk3588: Add support for sdmmc clocks in SPL") Suggested-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Cc: Jonas Karlman <jonas@kwiboo.se> Cc: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Fabio Estevam [Thu, 9 May 2024 16:42:25 +0000 (13:42 -0300)]
rockchip: rv1108: Remove unneeded local rv1108-cru.h
After the conversion of RV1108 to OF_UPSTREAM,
include/dt-bindings/clock/rv1108-cru.h is no longer needed because
there is dts/upstream/include/dt-bindings/clock/rv1108-cru.h from
upstream Linux.
Remove the unneeded rv1108-cru.h file.
Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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