]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
4 years agoconfigs: j721e_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3
Dave Gerlach [Thu, 16 Jul 2020 04:40:03 +0000 (23:40 -0500)]
configs: j721e_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3

Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agoconfigs: am65x_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3
Dave Gerlach [Thu, 16 Jul 2020 04:40:02 +0000 (23:40 -0500)]
configs: am65x_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3

Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agoarm: dts: k3-j721e-mcu-wakeup: Introduce chipid node
Dave Gerlach [Thu, 16 Jul 2020 04:40:01 +0000 (23:40 -0500)]
arm: dts: k3-j721e-mcu-wakeup: Introduce chipid node

Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agoarm: dts: k3-am65-wakeup: Introduce chipid node
Dave Gerlach [Thu, 16 Jul 2020 04:40:00 +0000 (23:40 -0500)]
arm: dts: k3-am65-wakeup: Introduce chipid node

Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agodm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs
Dave Gerlach [Thu, 16 Jul 2020 04:39:59 +0000 (23:39 -0500)]
dm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs

Introduce an soc_ti_k3_driver that allows identification and selection
of SoC specific data based on the JTAG ID register for device
identification, as described for AM65x[0] and J721E[1] devices.

[0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
[1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agotest: Add tests for SOC uclass
Dave Gerlach [Thu, 16 Jul 2020 04:39:58 +0000 (23:39 -0500)]
test: Add tests for SOC uclass

Add a sandbox SOC driver, and some tests for the SOC uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agodm: soc: Introduce UCLASS_SOC for SOC ID and attribute matching
Dave Gerlach [Thu, 16 Jul 2020 04:39:57 +0000 (23:39 -0500)]
dm: soc: Introduce UCLASS_SOC for SOC ID and attribute matching

Introduce UCLASS_SOC to be used for SOC identification and attribute
matching based on the SoC ID info. This allows drivers to be provided
for SoCs to retrieve SoC identifying information and also for matching
device attributes for selecting SoC specific data.

This is useful for other device drivers that may need different
parameters or quirks enabled depending on the specific device variant in
use.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
4 years agodoc: Add new doc for soc ID driver model
Dave Gerlach [Thu, 16 Jul 2020 04:39:56 +0000 (23:39 -0500)]
doc: Add new doc for soc ID driver model

Add a new documentation file for UCLASS_SOC and its usage to describe
the SoC Device ID framework that allows SoC identification and device
data matching.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agofdt_support: add static to fdt_node_set_part_info()
Masahiro Yamada [Wed, 15 Jul 2020 10:35:47 +0000 (19:35 +0900)]
fdt_support: add static to fdt_node_set_part_info()

This function is only called from fdt_fixup_mtdpart() in the same file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: When no tracking branch is provided, tell the user
Nicolas Boichat [Mon, 13 Jul 2020 02:50:01 +0000 (10:50 +0800)]
patman: When no tracking branch is provided, tell the user

The user can either count the number of patches, or provide a
tracking branch.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Make sure sendemail.suppresscc is (un)set correctly
Nicolas Boichat [Mon, 13 Jul 2020 02:50:00 +0000 (10:50 +0800)]
patman: Make sure sendemail.suppresscc is (un)set correctly

Setting sendemail.suppresscc to all or cccmd leads to --cc-cmd
parameter being ignored, and emails going either nowhere, or
just to the To: line maintainer.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoRevert "lib: fdt: Split fdtdec_setup_mem_size_base()"
Michal Simek [Fri, 10 Jul 2020 11:16:50 +0000 (13:16 +0200)]
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()"

This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6.

There is no user of this split function that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoRevert "lib: fdt: Split fdtdec_setup_memory_banksize()"
Michal Simek [Fri, 10 Jul 2020 11:16:49 +0000 (13:16 +0200)]
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()"

This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34.

There is no user of this split function that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoARM: rmobile: Switch back to fdtdec_setup_memory/banksize_fdt()
Michal Simek [Fri, 10 Jul 2020 11:16:48 +0000 (13:16 +0200)]
ARM: rmobile: Switch back to fdtdec_setup_memory/banksize_fdt()

The commit 361377dbdbc9 ("ARM: rmobile: Merge prior-stage firmware DT
fragment into U-Boot DT on Gen3") reverted changes introduced by commit
175f5027345c ("ARM: renesas: Configure DRAM size from ATF DT fragment")
that's why there is no reason to use functions with _fdt() suffix because
parameter is gd->fdt_blob as is already for functions without _fdt()
suffix.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoAdd information for skipped commit options
Patrick Delaunay [Thu, 2 Jul 2020 17:52:54 +0000 (19:52 +0200)]
Add information for skipped commit options

The unsupported Commit-xxx option are silently skipped
and removed as 're_remove=Commit-\w*', this patch adds
warning message in this case to detect misspelled issue
for the 2 supported options:
  Commit-notes:
  Commit-changes:

For example: the final 's' is missing (Commit-note:)

NB: no issue for Series-xxx option as only the supported
    options are accepted (see valid_series in series.py)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolib: libfdt: fdt_region: avoid NULL pointer access
Philippe Reynes [Thu, 2 Jul 2020 17:31:29 +0000 (19:31 +0200)]
lib: libfdt: fdt_region: avoid NULL pointer access

The function fdt_find_regions look in the exclude list for each
property, even if the name is NULL. It could happen if the fit
image is corrupted. On sandbox, it generates a segfault.

To avoid this issue, if the name of a property is NULL, we report
an error and avoid looking in the exclude list.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Detect unexpected END
Patrick Delaunay [Thu, 2 Jul 2020 17:08:24 +0000 (19:08 +0200)]
patman: Detect unexpected END

Detect unexpected 'END' line when a section is not detected.

This patch detect issue when tag name for section start is misspelled,
for example 'Commit-note:' for 'Commit-notes:'

  Commit-note:
  ....
  END

Then 'Commit-note:' is removed silently by re_remove = "Commit-\w*:"
but 'END' is kept in commit message.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocpu: Convert the methods to use a const udevice *
Simon Glass [Mon, 27 Jan 2020 05:06:27 +0000 (22:06 -0700)]
cpu: Convert the methods to use a const udevice *

These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Add support for generating a FIT
Simon Glass [Fri, 10 Jul 2020 00:39:45 +0000 (18:39 -0600)]
binman: Add support for generating a FIT

FIT (Flat Image Tree) is the main image format used by U-Boot. In some
cases scripts are used to create FITs within the U-Boot build system. This
is not ideal for various reasons:

- Each architecture has its own slightly different script
- There are no tests
- Some are written in shell, some in Python

To help address this, add support for FIT generation to binman. This works
by putting the FIT source directly in the binman definition, with the
ability to adjust parameters, etc. The contents of each FIT image come
from sub-entries of the image, as is normal with binman.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodtoc: Allow adding variable-sized data to a dtb
Simon Glass [Fri, 10 Jul 2020 00:39:44 +0000 (18:39 -0600)]
dtoc: Allow adding variable-sized data to a dtb

Add a method for adding a property containing arbitrary bytes. Make sure
that the tree can expand as needed in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agomkimage: Allow updating the FIT timestamp
Simon Glass [Fri, 10 Jul 2020 00:39:43 +0000 (18:39 -0600)]
mkimage: Allow updating the FIT timestamp

Normally the FIT timestamp is created the first time mkimage is run on a
FIT, when converting the source .its to the binary .fit file. This
corresponds to using the -f flag. But if the original input to mkimage is
a binary file (already compiled) then the timestamp is assumed to have
been set previously.

Add a -t flag to allow setting the timestamp in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Allow zero-length entries to overlap
Simon Glass [Fri, 10 Jul 2020 00:39:42 +0000 (18:39 -0600)]
binman: Allow zero-length entries to overlap

Some binary blobs unfortunately obtain their position in the image from
other binary blobs, such as Intel's 'descriptor'. In this case we cannot
rely on packing to work. It is not possible to produce a valid image in
any case, due to the missing blobs.

Allow zero-length overlaps so that this does not cause any problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Allow missing Intel blobs
Simon Glass [Fri, 10 Jul 2020 00:39:41 +0000 (18:39 -0600)]
binman: Allow missing Intel blobs

Update the Intel blob entries to support missing binaries.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Detect when valid images are not produced
Simon Glass [Fri, 10 Jul 2020 00:39:40 +0000 (18:39 -0600)]
binman: Detect when valid images are not produced

When external blobs are missing, show a message indicating that the images
are not functional.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Update errors and warnings to use stderr
Simon Glass [Fri, 10 Jul 2020 00:39:39 +0000 (18:39 -0600)]
patman: Update errors and warnings to use stderr

When warnings and errors are produced by tools they should be written to
stderr. Update the tout implementation to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Allow external binaries to be missing
Simon Glass [Fri, 10 Jul 2020 00:39:38 +0000 (18:39 -0600)]
binman: Allow external binaries to be missing

Sometimes it is useful to build an image even though external binaries are
not present. This allows the build system to continue to function without
these files, albeit not producing valid images.

U-Boot does with with ATF (ARM Trusted Firmware) today.

Add a new flag to binman to request this behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Convert existing binary blobs to blob_ext
Simon Glass [Fri, 10 Jul 2020 00:39:37 +0000 (18:39 -0600)]
binman: Convert existing binary blobs to blob_ext

Many of the existing blobs rely on external binaries which may not be
available. Move them over to use blob_ext to indicate this.

Unfortunately cros-ec-rw cannot use this class because it inherits
another. So set the 'external' value for that class.

While we are here, drop the import of Entry since it is not used (and
pylint3 complains).

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Add an etype for external binary blobs
Simon Glass [Fri, 10 Jul 2020 00:39:36 +0000 (18:39 -0600)]
binman: Add an etype for external binary blobs

It is useful to be able to distinguish between ordinary blobs such as
u-boot.bin and external blobs that cannot be build by the U-Boot build
system. If the external blobs are not available for some reason, then we
know that a value image cannot be built.

Introduce a new 'blob-ext' entry type for that.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Use super() instead of specifying parent type
Simon Glass [Fri, 10 Jul 2020 00:39:35 +0000 (18:39 -0600)]
binman: Use super() instead of specifying parent type

It is easier and less error-prone to use super() when the parent type is
needed. Update binman to remove the type names.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Re-enable concurrent tests
Simon Glass [Fri, 10 Jul 2020 00:39:34 +0000 (18:39 -0600)]
binman: Re-enable concurrent tests

With the change to absolute imports the concurrent tests feature
unfortunately broke. Fix it.

We cannot easy add a warning, since the output messes up tests which check
the output.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Adjust pylibfdt for incremental build
Simon Glass [Fri, 10 Jul 2020 00:39:33 +0000 (18:39 -0600)]
binman: Adjust pylibfdt for incremental build

If the pylibfdt shared-object file is detected, then Python assumes that
the libfdt.py file exists also.

Sometimes when an incremental build aborts, the shared-object file is
built but the libfdt.py is not. The only way out at this point is to use
'make mkproper', or similar.

Fix this by removing the .so file before it is built. This seems to make
Python rebuild everything.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Fix a few typos in the entry docs
Simon Glass [Fri, 10 Jul 2020 00:39:32 +0000 (18:39 -0600)]
binman: Fix a few typos in the entry docs

Some typos have been fixed in the generated entry docs but the code was
not updated. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Add support for calling mkimage
Simon Glass [Fri, 10 Jul 2020 00:39:31 +0000 (18:39 -0600)]
binman: Add support for calling mkimage

As a first step to integrating mkimage into binman, add a new entry type
that feeds data into mkimage for processing and incorporates that output
into the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Set a default toolpath
Simon Glass [Fri, 10 Jul 2020 00:39:30 +0000 (18:39 -0600)]
binman: Set a default toolpath

When binman is run from 'make check' it is given a toolpath so that the
latest tools (e.g. mkimage) are used. When run manually with no toolpath,
it relies on the system mkimage. But this may be missing or old.

Make some effort to find the built-from-soruce version by looking in the
current directory and in the builds created by 'make check'.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Specify the toolpath when running test coverage
Simon Glass [Fri, 10 Jul 2020 00:39:29 +0000 (18:39 -0600)]
binman: Specify the toolpath when running test coverage

At present binman's test coverage runs without a toolpath set. This means
that the system tools will be used. That may not be correct if they are
out of date or missing and this can result in a reduction in test coverage
below 100%.

Provide the toolpath to binman in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Correct the search patch for pylibfdt
Simon Glass [Fri, 10 Jul 2020 00:39:28 +0000 (18:39 -0600)]
binman: Correct the search patch for pylibfdt

Now that binman uses tools/ as its base directory for importing modules,
the path to the pylibfdt build by U-Boot is incorrect. Fix it with a new
path.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: cbfs: Fix IFWI typo
Simon Glass [Fri, 10 Jul 2020 00:39:27 +0000 (18:39 -0600)]
binman: cbfs: Fix IFWI typo

This comment references the wrong thing. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Output errors to stderr
Simon Glass [Fri, 10 Jul 2020 00:39:26 +0000 (18:39 -0600)]
binman: Output errors to stderr

At present binman outputs errors to stdout which means that fails are
effectively silent when printed by buildman, for example. Fix this by
outputing errors to stderr.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years ago.gitignore: Ignore Python 3 cache directories
Simon Glass [Fri, 10 Jul 2020 00:39:25 +0000 (18:39 -0600)]
.gitignore: Ignore Python 3 cache directories

These can appear when moving between branches that have different tools
in the tree. Ignore them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodm: core Fix long line in device_bind_common()
Simon Glass [Fri, 10 Jul 2020 00:39:24 +0000 (18:39 -0600)]
dm: core Fix long line in device_bind_common()

Fix an over-length line in this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agopatman: Add a -D option to enable debugging
Simon Glass [Mon, 6 Jul 2020 03:41:59 +0000 (21:41 -0600)]
patman: Add a -D option to enable debugging

Most users don't want to see traceback errors. Add an option to enable
them for debugging. Disable them by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Support collecting response tags in Patchstream
Simon Glass [Mon, 6 Jul 2020 03:41:57 +0000 (21:41 -0600)]
patman: Support collecting response tags in Patchstream

Collect response tags such as 'Reviewed-by' while parsing the stream.
This allows us to see what tags are present.

Add a new 'Fixes' tag also, since this is now quite common.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Allow disabling 'bright' mode with Print output
Simon Glass [Mon, 6 Jul 2020 03:41:56 +0000 (21:41 -0600)]
patman: Allow disabling 'bright' mode with Print output

At present all text is marked bright, which makes it stand out on the
terminal. Add a way to disable that, as is done with the Color class.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Add a 'test' subcommand
Simon Glass [Mon, 6 Jul 2020 03:41:55 +0000 (21:41 -0600)]
patman: Add a 'test' subcommand

At present we use --test to indicate that tests should be run. It is
better to use a subcommand for list, like binman. Change it and adjust
the existing code to fit under a 'send' subcommand, the default.

Give this subcommand the same default arguments as the others.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Allow different commands
Simon Glass [Mon, 6 Jul 2020 03:41:54 +0000 (21:41 -0600)]
patman: Allow different commands

At present patman only does one thing so does not have any comments. We
want to add a few more command, so create a sub-parser for the default
command ('send').

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Convert to ArgumentParser
Simon Glass [Mon, 6 Jul 2020 03:41:53 +0000 (21:41 -0600)]
patman: Convert to ArgumentParser

Convert from OptionParser to ArgumentParser to match binman. With this we
can easily add sub-commands.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Allow skipping patches at the end
Simon Glass [Mon, 6 Jul 2020 03:41:52 +0000 (21:41 -0600)]
patman: Allow skipping patches at the end

The -s option allows skipping patches at the top of the branch. Sometimes
there are commits at the bottom that need to be skipped. At present it is
necessary to count the number of commits and then use -c to tell patman
how many to process.

Add a -e option to easily skip a number of commits at the bottom of the
branch.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Allow creating patches for another branch
Simon Glass [Mon, 6 Jul 2020 03:41:51 +0000 (21:41 -0600)]
patman: Allow creating patches for another branch

Add a -b option to allow patches to be created from a branch other than
the current one.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Add a test that uses gitpython
Simon Glass [Mon, 6 Jul 2020 03:41:50 +0000 (21:41 -0600)]
patman: Add a test that uses gitpython

It is convenient to use gitpython to create a real git repo for testing
patman's operation. Add a test for this. So far it just checks that patman
produces the right number of patches for a branch.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Move main code out to a control module
Simon Glass [Mon, 6 Jul 2020 03:41:49 +0000 (21:41 -0600)]
patman: Move main code out to a control module

To make testing easier, move the code out from main into a separate
'control' module and split it into four parts: setup, preparing patches,
checking patches and emailing patches.

Add comments and fix a few code-style issues while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agopatman: Use test_util to show test results
Simon Glass [Mon, 6 Jul 2020 03:41:48 +0000 (21:41 -0600)]
patman: Use test_util to show test results

This handles skipped tests correctly, so use it instead of the existing
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Mon, 20 Jul 2020 13:25:32 +0000 (09:25 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- dm: core: Don't show an ACPI warning if there is no ordering
- x86: Enhance MTRR functionality to support multiple CPUs

4 years agox86: mtrr: Enhance 'mtrr' command to list MTRRs on any CPU
Simon Glass [Fri, 17 Jul 2020 14:48:31 +0000 (08:48 -0600)]
x86: mtrr: Enhance 'mtrr' command to list MTRRs on any CPU

Update this command so it can list the MTRRs on a selected CPU. If
'-c all' is used, then all CPUs are listed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp: Add more comments to the module
Simon Glass [Fri, 17 Jul 2020 14:48:30 +0000 (08:48 -0600)]
x86: mp: Add more comments to the module

Add a description of how this module works and also some missing function
comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mtrr: Update 'mtrr' to allow setting MTRRs on any CPU
Simon Glass [Fri, 17 Jul 2020 14:48:29 +0000 (08:48 -0600)]
x86: mtrr: Update 'mtrr' to allow setting MTRRs on any CPU

Add a -c option to mtrr to allow any CPU to be updated with this command.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mtrr: Restructure so command execution is in one place
Simon Glass [Fri, 17 Jul 2020 14:48:28 +0000 (08:48 -0600)]
x86: mtrr: Restructure so command execution is in one place

At present do_mtrr() does the 'list' subcommand at the top and the rest
below. Update it to do them all in the same place so we can (in a later
patch) add parsing of the CPU number for all subcommands.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mtrr: Update the command to use the new mtrr calls
Simon Glass [Fri, 17 Jul 2020 14:48:27 +0000 (08:48 -0600)]
x86: mtrr: Update the command to use the new mtrr calls

Use the multi-CPU calls to set the MTRR values. This still supports only
the boot CPU for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mtrr: Add support for writing to MTRRs on any CPU
Simon Glass [Fri, 17 Jul 2020 14:48:26 +0000 (08:48 -0600)]
x86: mtrr: Add support for writing to MTRRs on any CPU

To enable support for the 'mtrr' command, add a way to perform MTRR
operations on selected CPUs.

This works by setting up a little 'operation' structure and sending it
around the CPUs for action.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: mtrr: Update MTRRs on all CPUs
Simon Glass [Fri, 17 Jul 2020 14:48:25 +0000 (08:48 -0600)]
x86: mtrr: Update MTRRs on all CPUs

When the boot CPU MTRRs are updated, perform the same update on all other
CPUs so they are kept in sync.

This avoids kernel warnings about mismatched MTRRs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: coral: Update the memory map
Simon Glass [Fri, 17 Jul 2020 14:48:24 +0000 (08:48 -0600)]
x86: coral: Update the memory map

This currently excludes the temporary memory used to start up the APs.
Add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: Don't enable SMP in SPL
Simon Glass [Fri, 17 Jul 2020 14:48:23 +0000 (08:48 -0600)]
x86: Don't enable SMP in SPL

SMP should be set up in U-Boot where possible, not SPL. Disable it in SPL.
For 64-bit U-Boot we should find a way to allow SMP operations in U-Boot,
but this is somewhat more complicated. For now that is disabled too.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: mtrr: Use MP calls to list the MTRRs
Simon Glass [Fri, 17 Jul 2020 14:48:22 +0000 (08:48 -0600)]
x86: mtrr: Use MP calls to list the MTRRs

Update the mtrr command to use mp_run_on_cpus() to obtain its information.
Since the selected CPU is the boot CPU this does not change the result,
but it sets the stage for supporting other CPUs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp: Add iterators for CPUs
Simon Glass [Fri, 17 Jul 2020 14:48:21 +0000 (08:48 -0600)]
x86: mp: Add iterators for CPUs

It is convenient to iterate through the CPUs performing work on each one
and processing the result. Add a few iterator functions which handle this.
These can be used by any client code. It can call mp_run_on_cpus() on
each CPU that is returned, handling them one at a time.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp: Park CPUs before running the OS
Simon Glass [Fri, 17 Jul 2020 14:48:20 +0000 (08:48 -0600)]
x86: mp: Park CPUs before running the OS

With the new MP features the CPUs are no-longer parked when the OS is run.
Fix this by calling a special function to park them, just before the OS is
started.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp: Allow running functions on multiple CPUs
Simon Glass [Fri, 17 Jul 2020 14:48:19 +0000 (08:48 -0600)]
x86: mp: Allow running functions on multiple CPUs

Add a way to run a function on a selection of CPUs. This supports either
a single CPU, all CPUs, just the main CPU or just the 'APs', in Intel
terminology.

It works by writing into a mailbox and then waiting for the CPUs to notice
it, take action and indicate they are done.

When SMP is not yet enabled, this just calls the function on the main CPU.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Set the SMP flag when MP init is complete
Simon Glass [Fri, 17 Jul 2020 14:48:18 +0000 (08:48 -0600)]
x86: Set the SMP flag when MP init is complete

Set this flag so we can track when it is safe to use CPUs other than the
main one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoglobal_data: Add a generic global_data flag for SMP state
Simon Glass [Fri, 17 Jul 2020 14:48:17 +0000 (08:48 -0600)]
global_data: Add a generic global_data flag for SMP state

Allow keeping track of whether all CPUs have been enabled yet. This allows
us to know whether other CPUs need to be considered when updating
CPU-specific settings such as MTRRs on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp: Support APs waiting for instructions
Simon Glass [Fri, 17 Jul 2020 14:48:16 +0000 (08:48 -0600)]
x86: mp: Support APs waiting for instructions

At present the APs (non-boot CPUs) are inited once and then parked ready
for the OS to use them. However in some cases we want to send new requests
through, such as to change MTRRs and keep them consistent across CPUs.

Change the last state of the flight plan to go into a wait loop, accepting
instructions from the main CPU.

Drop cpu_map since it is not used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: cpu: Remove unnecessary #ifdefs
Simon Glass [Fri, 17 Jul 2020 14:48:15 +0000 (08:48 -0600)]
x86: cpu: Remove unnecessary #ifdefs

Drop some #ifdefs that are not needed or can be converted to compile-time
checks.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp_init: Adjust bsp_init() to return more information
Simon Glass [Fri, 17 Jul 2020 14:48:14 +0000 (08:48 -0600)]
x86: mp_init: Adjust bsp_init() to return more information

This function is misnamed since it does not actually init the BSP. Also
it is convenient to adjust it to return a little more information.

Rename and update the function, to allow it to return the BSP CPU device
and number, as well as the total number of CPUs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp_init: Set up the CPU numbers at the start
Simon Glass [Fri, 17 Jul 2020 14:48:13 +0000 (08:48 -0600)]
x86: mp_init: Set up the CPU numbers at the start

At present each CPU is given a number when it starts itself up. While this
saves a tiny amount of time by doing the device-tree read in parallel, it
is confusing that the numbering happens on the fly.

Move this code into mp_init() and do it at the start.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mtrr: Fix 'ensable' typo
Simon Glass [Fri, 17 Jul 2020 14:48:12 +0000 (08:48 -0600)]
x86: mtrr: Fix 'ensable' typo

Fix a typo in the command help.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp_init: Drop the num_cpus static variable
Simon Glass [Fri, 17 Jul 2020 14:48:11 +0000 (08:48 -0600)]
x86: mp_init: Drop the num_cpus static variable

This does not need to be global across all functions in this file. Pass a
parameter instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp_init: Switch parameter names in start_aps()
Simon Glass [Fri, 17 Jul 2020 14:48:10 +0000 (08:48 -0600)]
x86: mp_init: Switch parameter names in start_aps()

These parameters are named differently from elsewhere in this file. Switch
them to avoid confusion.

Also add comments to this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: mp_init: Avoid declarations in header files
Simon Glass [Fri, 17 Jul 2020 14:48:09 +0000 (08:48 -0600)]
x86: mp_init: Avoid declarations in header files

The functions used by the flight plan are declared in the header file but
are not used in any other file.

Move the flight plan steps down to just above where it is used so that we
can make these function static.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Move MP code into mp_init
Simon Glass [Fri, 17 Jul 2020 14:48:08 +0000 (08:48 -0600)]
x86: Move MP code into mp_init

At present the 'flight plan' for CPUs is passed into mp_init. But it is
always the same. Move it into the mp_init file so everything is in one
place. Also drop the SMI function since it does nothing. If we implement
SMIs, more refactoring will be needed anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp_init: Switch to livetree
Simon Glass [Fri, 17 Jul 2020 14:48:07 +0000 (08:48 -0600)]
x86: mp_init: Switch to livetree

Update this code to use livetree calls instead of flat-tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodm: core: Don't show an ACPI warning if there is no ordering
Simon Glass [Fri, 17 Jul 2020 14:49:25 +0000 (08:49 -0600)]
dm: core: Don't show an ACPI warning if there is no ordering

Some boards don't care about the ordering of ACPI code fragments. Change
the warning to a debug message.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoMerge tag 'mips-pull-2020-07-18' of https://gitlab.denx.de/u-boot/custodians/u-boot...
Tom Rini [Sat, 18 Jul 2020 15:34:49 +0000 (11:34 -0400)]
Merge tag 'mips-pull-2020-07-18' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips

- MIPS: refactor cache init and setup in start.S
- MIPS: sync asm header files with Linux 5.7
- MIPS: add initial support for Marvell Octeon MIPS64

4 years agomips: octeon: Add minimal Octeon 3 EBB7304 EVK support
Stefan Roese [Tue, 30 Jun 2020 10:08:58 +0000 (12:08 +0200)]
mips: octeon: Add minimal Octeon 3 EBB7304 EVK support

This patch adds very basic minimal support for the Marvell Octeon 3
CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
not support DDR3/4 initialization yet. To still use U-Boot on with this
port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot
to the prompt on this board.

Supported devices:
- UART
- reset
- CFI parallel NOR flash

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: octeon: use mips_mach_early_init() to copy to L2 cache
Stefan Roese [Tue, 30 Jun 2020 10:33:17 +0000 (12:33 +0200)]
mips: octeon: use mips_mach_early_init() to copy to L2 cache

This patch adds the code to copy itself from bootrom location to a
different location (TEXT_BASE) to the Octeon platform. Its used in
this case to copy the complete U-Boot image into L2 cache, which
greatly improves the bootup time - especially in regard to the
very long and complex DDR4 init code.

The Kconfig symbol CONFIG_MIPS_MACH_EARLY_INIT is enabled with this
patch for Octeon.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: octeon: dts: Add Octeon 3 cn73xx base dtsi file
Stefan Roese [Tue, 30 Jun 2020 10:08:57 +0000 (12:08 +0200)]
mips: octeon: dts: Add Octeon 3 cn73xx base dtsi file

This patch adds the base dtsi file for the Octeon 3 cn73xx SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: octeon: Initial minimal support for the Marvell Octeon SoC
Aaron Williams [Tue, 30 Jun 2020 10:08:56 +0000 (12:08 +0200)]
mips: octeon: Initial minimal support for the Marvell Octeon SoC

This patch adds very basic support for the Octeon III SoCs. Only
CFI parallel NOR flash and UART is supported for now.

Please note that the basic Octeon port does not include the DDR3/4
initialization yet. This will be added in some follow-up patches
later. To still use U-Boot on with this port, the L2 cache (4MiB on
Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the
prompt on such boards.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
4 years agosysreset: Add Octeon sysreset driver
Stefan Roese [Tue, 30 Jun 2020 10:08:55 +0000 (12:08 +0200)]
sysreset: Add Octeon sysreset driver

This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC
family.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 years agomips: Add CONFIG_MIPS_MACH_EARLY_INIT for very early mach init code
Stefan Roese [Tue, 30 Jun 2020 10:33:16 +0000 (12:33 +0200)]
mips: Add CONFIG_MIPS_MACH_EARLY_INIT for very early mach init code

This patch adds the optional call to mips_mach_early_init() to start.S
at a very early stage. Its disabled per default. It can be used for
very early machine / platform specific init code.  Its called very
early and at this stage the PC is allowed to differ from the linking
address (CONFIG_TEXT_BASE) as no absolute jump has been performed until
this call.

It will be used by thje Octeon platform.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 years agomips: sync asm/mipsregs.h with Linux 5.7
Daniel Schwierzeck [Sat, 11 Jul 2020 23:46:18 +0000 (01:46 +0200)]
mips: sync asm/mipsregs.h with Linux 5.7

Sync asm/mipsregs.h with Linux 5.7. Also replace the custom
symbols EBASE_CPUNUM and EBASE_WG with the according symbols
from Linux.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: sync asm/addrspace.h with Linux 5.7
Daniel Schwierzeck [Sat, 11 Jul 2020 23:46:17 +0000 (01:46 +0200)]
mips: sync asm/addrspace.h with Linux 5.7

Sync asm/addrspace.h with Linux 5.7

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: sync asm/asm.h with Linux 5.7
Daniel Schwierzeck [Sat, 11 Jul 2020 23:46:16 +0000 (01:46 +0200)]
mips: sync asm/asm.h with Linux 5.7

Sync asm/asm.h with Linux 5.7.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: remove deprecated UNCACHED_SDRAM() macro
Daniel Schwierzeck [Sat, 11 Jul 2020 23:46:15 +0000 (01:46 +0200)]
mips: remove deprecated UNCACHED_SDRAM() macro

This macro only served as a wrapper for CKSEG1ADDR() with an
exception for CONFIG_TB0229. CONFIG_TB0229 doesn't exist, thus
use CKSEG1ADDR() directly.

This also prepares for an upcoming asm header sync with Linux.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: add config options for generic cache setup code
Daniel Schwierzeck [Sat, 11 Jul 2020 22:45:57 +0000 (00:45 +0200)]
mips: add config options for generic cache setup code

Add an own Kconfig symbol for the initial disabling of caches
invoked from generic start code.

Also add an own Kconfig symbols for the initialization of caches
invoked from generic start code.

Until now both code paths could only be disabled with
CONFIG_SKIP_LOWLEVEL_INIT. But this is not flexible enough for
RAM boot scenarios like EJTAG or SPL payload or for machines
which don't require cache initialization or which want to
provide their own cache implementation.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: refactor disabling of caches
Daniel Schwierzeck [Sat, 11 Jul 2020 22:45:56 +0000 (00:45 +0200)]
mips: refactor disabling of caches

Logically this code belongs to cache_init.S.

If a complex SoC needs to replace the generic cache init,
mips_cache_disable() can now be called from custom start.S files.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: add KSEG1 wrapper for change_k0_cca
Daniel Schwierzeck [Sat, 11 Jul 2020 22:45:55 +0000 (00:45 +0200)]
mips: add KSEG1 wrapper for change_k0_cca

change_k0_cca() is called multiple times. Move the code for
changing to KSEG1 to a macro to avoid code duplication.

Also fix missing change to KSEG1 when changing to CONF_CM_CACHABLE_COW.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: start.S: remove dead code
Daniel Schwierzeck [Sat, 11 Jul 2020 22:45:54 +0000 (00:45 +0200)]
mips: start.S: remove dead code

Since commit 703ec9ddf965 ("MIPS: Stop building position independent code")
the relocation code was completely reworked and removed from start.S.
Remove some left-overs of the old code.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: cache: Make invalidate_dcache_range() weak to enable overwrite
Stefan Roese [Tue, 30 Jun 2020 10:33:19 +0000 (12:33 +0200)]
mips: cache: Make invalidate_dcache_range() weak to enable overwrite

This patch adds __weak to invalidate_dcache_range() in lib/cache.c. This
makes it possible to overwrite this function by a platforms specific
version, which will be done for Octeon.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: cache: Make flush_cache() weak to enable overwrite
Stefan Roese [Thu, 14 May 2020 09:59:04 +0000 (11:59 +0200)]
mips: cache: Make flush_cache() weak to enable overwrite

This patch adds __weak to flush_cache() in lib/cache.c. This makes it
possible to overwrite this function by a platforms specific version,
like done with the Octeon base port.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM
Stefan Roese [Thu, 14 May 2020 09:59:03 +0000 (11:59 +0200)]
mips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM

This patch enables the usage of CONFIG_MIPS_L2_CACHE without
CONFIG_MIPS_CM, which is what is needed for the newly added Octeon
platform.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: reloc: Change R_MIPS_NONE to catch pre-reloc BSS usage
Stefan Roese [Fri, 5 Jun 2020 08:29:25 +0000 (10:29 +0200)]
mips: reloc: Change R_MIPS_NONE to catch pre-reloc BSS usage

This patch changes the R_MIPS_NONE define from 0 to a magic value. This
makes it possible to better detect any forbidden pre-relocation usage
of BSS variables, as they are often zero'ed and then relocation is
stopped too early.

Additionally the error message is improved to also print the faulting
address. This helps finding the root-cause for this breakage by
comparing this address with the values in System.map.

This patch helps a lot when working on pre-relocation code, like the
Octeon DDR init code, where such variables have hit me multiple times
now.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
4 years agomips: traps: Set WG bit in EBase register on Octeon
Stefan Roese [Thu, 14 May 2020 09:59:06 +0000 (11:59 +0200)]
mips: traps: Set WG bit in EBase register on Octeon

WG (bit 11) needs to be set on Octeon to enable writing bits 63:30 of
the exception base register.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: time: Only compile the weak get_tbclk() when needed
Stefan Roese [Thu, 14 May 2020 09:59:05 +0000 (11:59 +0200)]
mips: time: Only compile the weak get_tbclk() when needed

This patch opts-out the compilation of get_tbclk() if
CONFIG_SYS_MIPS_TIMER_FREQ is not defined. This is used on the Octeon
platform, where the weak get_tbclk() function is overwritten by its
platform specific one.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agoMerge branch '2020-07-17-misc-fixes'
Tom Rini [Fri, 17 Jul 2020 20:08:54 +0000 (16:08 -0400)]
Merge branch '2020-07-17-misc-fixes'

A large number of assorted fixes, including but not limited to:
- Correct fixdep and CONFIG_IS_ENABLED(...)
- lz4 on big endian
- Assorted LMB hardening
- Remove bd_t typedef