arm: bcm283x undefined reference to "print_cpuinfo"
Builds for Raspberry Pi targets fail when CONFIG_DISPLAY_CPUINFO is
enabled and following error can be seen -
common/board_f.o:(.rodata.init_sequence_f+0x90):
undefined reference to `print_cpuinfo'
Kevin Chen [Thu, 3 Aug 2023 08:12:18 +0000 (16:12 +0800)]
armv8: Skip PIE in SPL due to load alignment fault.
When PIE is enabled in start.S, u-boot/-spl use __rel_dyn_start
and _rel_dyn_end symbol to be loaded to and executed at a
different address than it was linked at.
u-boot-spl.lds is used in SPL build, but relocation information
section(.rela*) were discarded.
In line number 80 in arch/arm/cpu/armv8/u-boot-spl.lds
/DISCARD/ : { *(.rela*) }
If PIE enabled in SPL, __rel_dyn_start which is defined as
.rel_dyn_start in sections.c will be apended to the end of
.bss section.
In our ASPEED case, size of .bss section would let .rel_dyn_start
without 8-byte alignment, leading to alignment fault when
executing ldp instuction in pie_fix_loop.
Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>
Sean Anderson [Mon, 31 Jul 2023 21:27:33 +0000 (17:27 -0400)]
arm: Use builtins for ffs/fls
Since ARMv5, the clz instruction allows for efficient implementation of
ffs/fls with builtins. Until ARMv7 (with Thumb-2), this instruction is
only available in ARM mode. LTO makes it difficult to force specific
functions to be in ARM mode, as it is effectively a form of very
aggressive inlining. To work around this, fls/ffs are implemented in
assembly for ARMv5 and ARMv6 when compiling U-Boot in Thumb mode.
Overall, this saves around 75 bytes per call.
This code is synced with v5.15 of the Linux kernel.
Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Roger Quadros [Sat, 5 Aug 2023 08:14:40 +0000 (11:14 +0300)]
arm: dts: k3-am64: Sync DT with Linux v6.5-rc1
Sync all am642-evm/am642-sk related DT files
with Linux v6.5-rc1.
- drop timer1 in favor of main_timer0 in am64-main.dtsi.
Need to delete clock & power domain properties of
main_timer1 in -r5.dts else won't boot. This is because
timer_init is done during rproc_start to start System Firmware,
but we can't do any clock/power-domain operations before
System Firmware starts.
- same constraint applies to main_uart0
- drop cpsw3g custom DT property 'mac_efuse' and custom
DT node cpsw-phy-sel as driver picks these from standard
property/node.
- include board dts file in -r5 dts file to avoid duplication
of nodes. Include -u-boot.dtsi on top.
- drop duplicate nodes in -r5 dts and -u-boot.dtsi
This node should be in the board DT file and should come from upstream.
Moreover, this PMIC is no present on all variants of am642-sk
and will need a separate board DT file.
Tom Rini [Wed, 16 Aug 2023 01:49:34 +0000 (21:49 -0400)]
Merge branch '2023-08-15-add-SGMII-support-for-TI-j7200' into next
To quote the author:
This series adds support for SGMII mode to the CPSW driver to enable the
functionality on TI's J7200 SoC.
Supporting SGMII mode also requires changes to the WIZ driver which acts
as a wrapper for the SerDes used by the CPSW MAC to transmit data to the
Ethernet PHY daughtercard mounted on the I2C GPIO Expander 2 connector
on the J7200 EVM.
Powering on and resetting the Ethernet PHY requires MDIO support which
is added to the CPSW driver.
For supporting DMA transactions from the MAIN CPSW instance to the A72
Host on J7200 SoC, the corresponding PSI-L endpoint information is added
for the J721E SoC, which is applicable to J7200 SoC as well.
The SGMII daughtercard used for testing SGMII mode has TI's DP83869 PHY.
Thus, enable the config for DP83869 driver functionality. Also, enable
GPIO HOG config.
configs: j7200_evm_a72: Enable configs for SGMII support with MAIN CPSW0
The MAIN CPSW0 instance of CPSW Ethernet Switch on TI's J7200 SoC
supports SGMII mode. To enable support for utilizing the SGMII
daughtercard with TI's DP83869 PHY, enable the corresponding config.
Also, since the SGMII daughtercard is connected to the I2C GPIO
Expander 2 connector on the J7200 EVM, powering on the Ethernet PHY and
resetting it requires GPIO Hogging capability. Enable it as well.
Suman Anna [Wed, 2 Aug 2023 08:17:26 +0000 (13:47 +0530)]
net: ti: am65-cpsw-nuss: Add logic to support MDIO reset
Enhance the AM65 CPSW NUSS driver to perform a MDIO reset using a GPIO
line. Logic is also added to perform a pre and post delay around reset
using the optional 'reset-delay-us' and 'reset-post-delay-us' properties.
This is similar to the reset being performed in the Linux kernel. The
reset is done once when the CPSW MDIO bus is being initialized.
Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Suman Anna [Wed, 2 Aug 2023 08:17:24 +0000 (13:47 +0530)]
dma: ti: Update J21E PSIL endpoint information for MAIN CPSW0
The PSIL endpoint data for J721E currently covers only the MCU domain
CPSW0 instance. Add the data for the MAIN domain CPSW0 as well to allow
the MAIN domain Ethernet ports to be usable on any platform using J721E
SoC.
Additionally, since J721E's PSIL endpoint data is applicable to J7200
SoC as well, the MAIN CPSW0 instance on J7200 will also be usable now.
Signed-off-by: Suman Anna <s-anna@ti.com>
[s-vadapalli@ti.com: Update commit message indicating support for J7200] Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Tom Rini [Tue, 15 Aug 2023 14:39:41 +0000 (10:39 -0400)]
Merge branch '2023-08-14-assorted-general-updates' into next
- Assorted PCI-related fixes, add Apple Type-C PHY support, semihosting
updates, fix a FAT corner-case, update the help on the pxe cmd and
clean up the gpio uclass slightly.
Marek Vasut [Tue, 1 Aug 2023 23:26:02 +0000 (01:26 +0200)]
gpio: Use separate bitfield array to indicate GPIO is claimed
The current gpio-uclass design uses name field in struct gpio_dev_priv as
an indicator that GPIO is claimed by consumer. This overloads the function
of name field and does not work well for named pins not configured as GPIO
pins.
Introduce separate bitfield array as the claim indicator.
This unbreaks dual-purpose AF and GPIO operation on STM32MP since commit 2c38f7c31806 ("pinctrl: pinctrl_stm32: Populate uc_priv->name[] with pinmux node's name")
where any pin which has already been configured as AF could no longer be
claimed as dual-purpose GPIO. This is important for pins like STM32 MMCI
st,cmd-gpios .
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 31 Jul 2023 08:33:23 +0000 (16:33 +0800)]
cmd: pxe: Update the command help
Currently the "help" displays pxe command help text like this:
=> help
...
printenv - print environment variables
pxe - commands to get and boot from pxe files
To use IPv6 add -ipv6 parameter
qfw - QEMU firmware interface
...
This does not read clearly. Remove the IPv6 stuff as it is in
the detailed help text so that it fits just a single line.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 16 Jul 2023 15:53:24 +0000 (17:53 +0200)]
pci: Fix device_find_first_child() return value handling
This function only ever returns 0, but may not assign the second
parameter. Same thing for device_find_next_child(). Do not assign
ret to stop proliferation of this misuse.
Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Fri, 14 Jul 2023 19:15:16 +0000 (21:15 +0200)]
pci: apple: Enable CONFIG_SYS_PCI_64BIT
The Apple hardware supports 64-bit prefetchable memory windows so
enable CONFIG_SYS_PCI_64BIT. This fixes BAR assignments for the
Broadcom Ethernet controller used in some of the desktop machines.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Tom Rini [Mon, 14 Aug 2023 13:14:51 +0000 (09:14 -0400)]
Merge branch '2023-08-14-keep-fixed-gpio-regulator-count-in-balance' into next
To quote the author:
The commit 4fcba5d556b4 ("regulator: implement basic reference counter")
have made it more important to keep fixed/gpio regulators enable/disable
state in balance.
This series fixes an inbalance in the mmc_dw driver and changes to use
the more relaxed regulator_set_enable_if_allowed function for a few
other drivers.
The regulator_set_enable_if_allowed function is more relaxed and will
return ENOSYS if the provided regulator is NULL or when DM_REGULATOR
was disabled. Using the following call convention should be safe:
ret = regulator_set_enable_if_allowed(<supply>, <true|false>);
if (ret && ret != -ENOSYS)
return ret;
Jonas Karlman [Wed, 19 Jul 2023 21:20:59 +0000 (21:20 +0000)]
mmc: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556b4 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.
Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # P895 Tegra 3; Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # rockpro64-rk3399
Jonas Karlman [Wed, 19 Jul 2023 21:20:57 +0000 (21:20 +0000)]
usb: ehci-generic: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556b4 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.
Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Marek Vasut <marex@denx.de>
Jonas Karlman [Wed, 19 Jul 2023 21:20:56 +0000 (21:20 +0000)]
usb: dwc2: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556b4 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.
Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # rockpro64-rk3399 Reviewed-by: Marek Vasut <marex@denx.de>
Jonas Karlman [Wed, 19 Jul 2023 21:20:55 +0000 (21:20 +0000)]
adc: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556b4 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.
Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # rockpro64-rk3399
Simon Glass [Sun, 30 Jul 2023 17:17:02 +0000 (11:17 -0600)]
bootstd: cros: Add ARM support
Support booting ChromiumOS on ARM devices using FIT. Add an entry into the
boot implementation which does not require a command line. This can be
expanded over time as the bootm code is refactored.
Simon Glass [Fri, 11 Aug 2023 01:33:18 +0000 (19:33 -0600)]
bootstd: Add a command to read all files for a bootflow
Some bootflows (such as EFI and ChromiumOS) delay reading the kernel until
it is needed to boot. This saves time when scanning and avoids needing to
allocate memory for something that may never be used.
To permit reading of these files, add a new 'bootflow read' command.
Simon Glass [Sun, 30 Jul 2023 17:17:00 +0000 (11:17 -0600)]
bootstd: Allow display of the x86 setup information
Provide an option to dump this information if available.
Move the funciion prototype to the common x86 header. Allow the command
line to be left out since 'bootflow info' show this itself and it is
not in the correct place in memory until the kernel is actually booted.
Simon Glass [Sun, 30 Jul 2023 17:16:57 +0000 (11:16 -0600)]
bootstd: cros: Add a function to read info from partition
The code to read the ChromiumOS information from the partition is
currently all in one function. It reads the entire kernel, which is
unnecessary unless it is to be booted.
Create a new function which reads just the minimum required data from the
disk, then obtains what it needs from there.
For now this function is not used. Future work will plumb it in.
Simon Glass [Sun, 30 Jul 2023 17:16:56 +0000 (11:16 -0600)]
bootstd: Add private bootmeth data to the bootflow
Some bootmeths need to store their own information related to the
bootflow, in addition to the generic information in struct bootflow.
Add a pointer for this.
Simon Glass [Sun, 30 Jul 2023 17:16:55 +0000 (11:16 -0600)]
bootstd: cros: Add private info for ChromiumOS
Create a new private structure to hold information gleaned from the disk.
This will allow separation between reading of the bootflow information and
(later) reading the whole kernel.
Simon Glass [Sun, 30 Jul 2023 17:16:53 +0000 (11:16 -0600)]
bootstd: Move common zimage functions to bootm.h
We want to avoid using #ifdefs around header files and in the code. It
makes sense to collect the various functions used for loading images into
a single header which can be included by all architectures. The best place
for this is the arch-neutral bootm.h header, so use that.
Move some zimage functions into this bootm.h header.
Simon Glass [Sun, 30 Jul 2023 17:16:49 +0000 (11:16 -0600)]
bootstd: cros: Bring in some ChromiumOS structures
Add a header file with structures for booting ChromiumOS, taken from the
vboot tree. Using these makes it easier to understand the code.
Note that the code style has not been updated for U-Boot, with use of
uint64_t, __attribute__((packed)) and one comment-style nit. This should
make it easier to keep the code in sync. It was taken from commit:
Tom Rini [Wed, 9 Aug 2023 17:15:51 +0000 (13:15 -0400)]
Merge branch '2023-08-09-misc-cleanups' into next
- Rework the arch linker scripts to be consistent for all, support
Kconfig fragments in the board directory and fix some Kconfig options
that were hex-type by default of 0 not 0x0.
Jason Kacines [Tue, 11 Jul 2023 21:20:46 +0000 (16:20 -0500)]
scripts: kconfig: Add config fragment support in board/../
Add support to config fragments (.config) located in the /board
directory. This will allow only base defconfigs to live in /configs and
all fragments to live in their respective device directory in /board/..
Shiji Yang [Thu, 3 Aug 2023 01:47:17 +0000 (09:47 +0800)]
treewide: unify the linker symbol reference format
Now all linker symbols are declared as type char[]. Though we can
reference the address via both the array name 'var' and its address
'&var'. It's better to unify them to avoid confusing developers.
This patch converts all '&var' linker symbol refrences to the most
commonly used format 'var'.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Shiji Yang [Thu, 3 Aug 2023 01:47:16 +0000 (09:47 +0800)]
treewide: rework linker symbol declarations in sections header
1. Convert all linker symbols to char[] type so that we can get the
corresponding address by calling array name 'var' or its address
'&var'. In this way, we can avoid some potential issues[1].
2. Remove unused symbol '_TEXT_BASE'. It has been abandoned and has
not been referenced by any source code.
3. Move '__data_end' to the arch x86's own sections header as it's
only used by x86 arch.
4. Remove some duplicate declared linker symbols. Now we use the
standard header file to declare them.
[1] This patch fixes the boot failure on MIPS target. Error log:
SPL: Image overlaps SPL
Fixes: 1b8a1be1a1f1 ("spl: spl_legacy: Fix spl_end address") Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 2 Aug 2023 15:09:43 +0000 (11:09 -0400)]
Kconfigs: Correct default of "0" on hex type entries
It is not a parse error to have a default value of "0" for a "hex" type
entry, instead of "0x0". However, "0" and "0x0" are not treated the
same even by the tools themselves. Correct this by changing the default
value from "0" to "0x0" for all hex type questions that had the
incorrect default. Fix one instance (in two configs) of a default of "0"
being used on a hex question to be "0x0". Remove the cases where a
defconfig had set a value of "0x0" to be used as the default had been
"0".
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
If an error message contains a function name, it should match the name of
the function throwing the message.
Fixes: 7739d93d8288 ("pci: Match region flags using a mask") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Dan Carpenter [Thu, 3 Aug 2023 10:29:34 +0000 (13:29 +0300)]
btrfs: fix some error checking for btrfs_decompress()
The btrfs_decompress() function mostly (u32)-1 on error but it can
also return -EPERM or other kernel error codes from zstd_decompress().
The "ret" variable is an int, so we could just check for negatives.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Qu Wenruo <wqu@suse.com>
Dan Carpenter [Mon, 31 Jul 2023 14:08:29 +0000 (17:08 +0300)]
expo: allocate correct amount of memory
This should be allocating the memory for "item" instead of "menu".
The item struct is 48 bytes instead of 96 (assuming a 64bit system)
so this saves a little memory.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Dan Carpenter [Wed, 26 Jul 2023 06:59:52 +0000 (09:59 +0300)]
fdt: off by one in ofnode_lookup_fdt()
The "oftree_count" is the number of entries which have been set in
the oftree_list[] array. If all the entries have been initialized then
this off by one would result in reading one element beyond the end
of the array.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Dan Carpenter [Wed, 26 Jul 2023 06:59:04 +0000 (09:59 +0300)]
fs: btrfs: Prevent error pointer dereference in list_subvolums()
If btrfs_read_fs_root() fails with -ENOENT, then we go to the next
entry. Fine. But if it fails for a different reason then we need
to clean up and return an error code. In the current code it
doesn't clean up but instead dereferences "root" and crashes.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Marek Behún <kabel@kernel.org> Reviewed-by: Qu Wenruo <wqu@suse.com>
Dan Carpenter [Wed, 26 Jul 2023 06:58:34 +0000 (09:58 +0300)]
cros_ec: Fix an error code is cros_ec_get_sku_id()
The ec_command_inptr() function returns negative error codes or
the number of bytes that it was able to read. The cros_ec_get_sku_id()
function should return negative error codes. Right now it returns
positive error codes or negative byte counts.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Dan Carpenter [Tue, 25 Jul 2023 06:50:26 +0000 (09:50 +0300)]
cmd: Fix a size parameter in test_readonly()
The parentheses are in the wrong place so this passes the number of
bytes to write as "sizeof(index_0) != TPM_SUCCESS" when just
"sizeof(index_0)" was intended. (1 byte vs 4 bytes).
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Both the Linux kernel and libbsd agree that strlcpy() should always
return strlen(src) and not include the NUL termination. The incorrect
U-Boot implementation makes it impossible to check the return value for
truncation, and breaks code written with the usual implementation in
mind (for example, fdtdec_add_reserved_memory() was subtly broken).
I reviewed all callers of strlcpy() and strlcat() and fixed them
according to my understanding of the intended function.
In [1] Sam points out an assertion does not hold true for 32-bit
platforms, which only impacts Large File Support (LFS) API usage
in erofs-utils according to Xiang [2]. We don't think these APIs
are used in u-boot and this restriction could be safely removed.
Fixes: 3a21e92fc255 ("fs/erofs: Introduce new features including ztailpacking, fragments and dedupe") Signed-off-by: Yifan Zhao <zhaoyifan@sjtu.edu.cn> Tested-by: Sam Edwards <CFSworks@gmail.com>
CONFIG_$(SPL_TPL_)SYS_MALLOC_F_LEN is defined as hex. If set to zero
manually, .config contains '0x0' and not '0' as value.
The default value for CONFIG_SPL_SYS_MALLOC_F_LEN should not be set to 0
but to 0x0 if CONFIG_SPL_FRAMEWORK=n to match a manually set value.
Fixes: c0126bd862a0 ("spl: Support bootstage, log, hash and early malloc in TPL") Fixes: b61694705217 ("SPL: Do not enable SPL_SYS_MALLOC_SIMPLE without SPL_FRAMEWORK by default") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com>
There is another SPL_MD5 option defined in lib/Kconfig.
Renaming SPL_MD5_SUPPORT introduced duplicate option with
different description. As for now FIT and hash algorithm options
are not related to each others, removing a duplicate option seems OK.
Mathew McBride [Mon, 7 Aug 2023 01:41:08 +0000 (01:41 +0000)]
board: ten64: add missing error checks for retimer power on
The retimer reset/power on logic was changed in a recent commit,
however, it neglected to check if the commands sent to the
board microcontroller (to control power to the retimer chip)
actually completed.
Add return checks for these operations so any failures will
be reported to the user.
Signed-off-by: Mathew McBride <matt@traverse.com.au> Fixes: 7a041fea2 ("board: traverse: ten64: ensure retimer reset
is done on new board revisions")
Marek Vasut [Sun, 6 Aug 2023 18:57:34 +0000 (20:57 +0200)]
ARM: renesas: Update MAINTAINERS file
Update MAINTAINERS file. Add missing MAINTAINERS file for Spider,
Whitehawk and V3HSK boards. Update mail addresses. Add file globs
to match on DT and driver files related to these boards.
The GRPEACH and R2DPLUS are special in that they are not R-Car
and have their own set of specialized drivers.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tom Rini [Fri, 4 Aug 2023 21:07:44 +0000 (17:07 -0400)]
Azure: Squash a number of jobs and re-order slightly
To reduce overall job time, move a number of smaller jobs together.
These should still be safely under 1 hour total time, but reducing the
overall number of jobs should help with the queue slightly.
Tom Rini [Fri, 4 Aug 2023 20:46:15 +0000 (16:46 -0400)]
Azure: Rework Rockchip jobs again
The job for rockchip vendor platforms has again gotten close to or
exceeded one hour. Rework things such that we move the 32bit platforms
back to the general 32bit ARM job (as there's time there) and make these
build only the 64bit platforms.
Lukas Funke [Thu, 3 Aug 2023 15:22:15 +0000 (17:22 +0200)]
binman: etype: Add xilinx-bootgen etype
This adds a new etype 'xilinx-bootgen'. By using this etype it is
possible to created an signed SPL (FSBL in Xilinx terms) for
ZynqMP boards.
The etype uses Xilinx Bootgen tools in order to transform the SPL into
a bootable image and sign the image with a given primary and secondary
public key. For more information to signing the FSBL please refer to the
Xilinx Bootgen documentation.
For this to work the hash of the primary public key has to be fused
into the ZynqMP device and authentication (RSA_EN) has to be set.
For testing purposes: if ppk hash check should be skipped one can add
the property 'fsbl_config = "bh_auth_enable";' to the etype. However,
this should only be used for testing(!).
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Lukas Funke [Thu, 3 Aug 2023 15:22:13 +0000 (17:22 +0200)]
binman: btool: Add Xilinx Bootgen btool
Add the Xilinx Bootgen as bintool. Xilinx Bootgen is used to create
bootable SPL (FSBL in Xilinx terms) images for Zynq/ZynqMP devices. The
btool creates a signed version of the SPL. Additionally to signing the
key source for the decryption engine can be passend to the boot image.
projects / u-boot.git / log