From: Sean Anderson <seanga2@gmail.com>
Date: Fri, 16 Oct 2020 22:57:49 +0000 (-0400)
Subject: spi: dw: Rearrange struct dw_spi_priv
X-Git-Url: http://git.dujemihanovic.xyz/img/static/gitweb.css?a=commitdiff_plain;h=ddd3450f399051478263e823f5f778745824bdb3;p=u-boot.git

spi: dw: Rearrange struct dw_spi_priv

This should reduce the size of the struct, and also groups more similar
fields together.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
---

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 89a8266052..0ebd2cf3cb 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -95,27 +95,26 @@ struct dw_spi_platdata {
 };
 
 struct dw_spi_priv {
-	void __iomem *regs;
-	unsigned int freq;		/* Default frequency */
-	unsigned int mode;
 	struct clk clk;
-	unsigned long bus_clk_rate;
-
+	struct reset_ctl_bulk resets;
 	struct gpio_desc cs_gpio;	/* External chip-select gpio */
 
-	int bits_per_word;
-	u8 cs;			/* chip select pin */
-	u8 tmode;		/* TR/TO/RO/EEPROM */
-	u8 type;		/* SPI/SSP/MicroWire */
-	int len;
+	void __iomem *regs;
+	unsigned long bus_clk_rate;
+	unsigned int freq;		/* Default frequency */
+	unsigned int mode;
 
-	u32 fifo_len;		/* depth of the FIFO buffer */
-	void *tx;
-	void *tx_end;
+	const void *tx;
+	const void *tx_end;
 	void *rx;
 	void *rx_end;
+	u32 fifo_len;			/* depth of the FIFO buffer */
 
-	struct reset_ctl_bulk	resets;
+	int bits_per_word;
+	int len;
+	u8 cs;				/* chip select pin */
+	u8 tmode;			/* TR/TO/RO/EEPROM */
+	u8 type;			/* SPI/SSP/MicroWire */
 };
 
 static inline u32 dw_read(struct dw_spi_priv *priv, u32 offset)