From: Eric Nelson <eric.nelson@boundarydevices.com>
Date: Sun, 4 Mar 2012 11:47:37 +0000 (+0000)
Subject: i.MX6: define CACHELINE_SIZE
X-Git-Tag: v2025.01-rc5-pxa1908~17674^2~177^2~22
X-Git-Url: http://git.dujemihanovic.xyz/img/static/gitweb.css?a=commitdiff_plain;h=c415919d5790977b2d498105c5dc3475bb0895e6;p=u-boot.git

i.MX6: define CACHELINE_SIZE

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
---

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index cad957a3b7..1033d056fc 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -19,6 +19,8 @@
 #ifndef __ASM_ARCH_MX6_IMX_REGS_H__
 #define __ASM_ARCH_MX6_IMX_REGS_H__
 
+#define CONFIG_SYS_CACHELINE_SIZE	32
+
 #define ROMCP_ARB_BASE_ADDR             0x00000000
 #define ROMCP_ARB_END_ADDR              0x000FFFFF
 #define CAAM_ARB_BASE_ADDR              0x00100000