From: Tom Rini Date: Sun, 21 Feb 2021 01:06:10 +0000 (-0500) Subject: arm: Remove mx53ard board X-Git-Url: http://git.dujemihanovic.xyz/img/static/gitweb.css?a=commitdiff_plain;h=1c4bd238b5a5fec8f2a30bca6a212372a62c9e5b;p=u-boot.git arm: Remove mx53ard board This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Fabio Estevam Signed-off-by: Tom Rini Reviewed-by: Fabio Estevam --- diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig index bde37bb97e..b8559da2ec 100644 --- a/arch/arm/mach-imx/mx5/Kconfig +++ b/arch/arm/mach-imx/mx5/Kconfig @@ -44,10 +44,6 @@ config TARGET_MX51EVK select BOARD_LATE_INIT select MX51 -config TARGET_MX53ARD - bool "Support mx53ard" - select MX53 - config TARGET_MX53CX9020 bool "Support CX9020" select BOARD_LATE_INIT @@ -91,7 +87,6 @@ config SYS_SOC source "board/beckhoff/mx53cx9020/Kconfig" source "board/freescale/mx51evk/Kconfig" -source "board/freescale/mx53ard/Kconfig" source "board/freescale/mx53evk/Kconfig" source "board/freescale/mx53loco/Kconfig" source "board/freescale/mx53smd/Kconfig" diff --git a/board/freescale/mx53ard/Kconfig b/board/freescale/mx53ard/Kconfig deleted file mode 100644 index 41f46a04ac..0000000000 --- a/board/freescale/mx53ard/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_MX53ARD - -config SYS_BOARD - default "mx53ard" - -config SYS_VENDOR - default "freescale" - -config SYS_SOC - default "mx5" - -config SYS_CONFIG_NAME - default "mx53ard" - -endif diff --git a/board/freescale/mx53ard/MAINTAINERS b/board/freescale/mx53ard/MAINTAINERS deleted file mode 100644 index fa81afe9a3..0000000000 --- a/board/freescale/mx53ard/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -MX53ARD BOARD -M: Fabio Estevam -S: Maintained -F: board/freescale/mx53ard/ -F: include/configs/mx53ard.h -F: configs/mx53ard_defconfig diff --git a/board/freescale/mx53ard/Makefile b/board/freescale/mx53ard/Makefile deleted file mode 100644 index e963a24025..0000000000 --- a/board/freescale/mx53ard/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2007, Guennadi Liakhovetski -# -# (C) Copyright 2011 Freescale Semiconductor, Inc. - -obj-y := mx53ard.o diff --git a/board/freescale/mx53ard/imximage_dd3.cfg b/board/freescale/mx53ard/imximage_dd3.cfg deleted file mode 100644 index fd033187b7..0000000000 --- a/board/freescale/mx53ard/imximage_dd3.cfg +++ /dev/null @@ -1,82 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2009 - * Stefano Babic DENX Software Engineering sbabic@denx.de. - * - * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure - * and create imximage boot image - * - * The syntax is taken as close as possible with the kwbimage - */ - -/* image version */ -IMAGE_VERSION 2 - -/* - * Boot Device : one of - * spi, sd (the board has no nand neither onenand) - */ -BOOT_FROM sd - -/* - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ -DATA 4 0x53fa8554 0x00300000 -DATA 4 0x53fa8558 0x00300040 -DATA 4 0x53fa8560 0x00300000 -DATA 4 0x53fa8564 0x00300040 -DATA 4 0x53fa8568 0x00300040 -DATA 4 0x53fa8570 0x00300000 -DATA 4 0x53fa8574 0x00300000 -DATA 4 0x53fa8578 0x00300000 -DATA 4 0x53fa857c 0x00300040 -DATA 4 0x53fa8580 0x00300040 -DATA 4 0x53fa8584 0x00300000 -DATA 4 0x53fa8588 0x00300000 -DATA 4 0x53fa8590 0x00300040 -DATA 4 0x53fa8594 0x00300000 -DATA 4 0x53fa86f0 0x00300000 -DATA 4 0x53fa86f4 0x00000000 -DATA 4 0x53fa86fc 0x00000000 -DATA 4 0x53fa8714 0x00000000 -DATA 4 0x53fa8718 0x00300000 -DATA 4 0x53fa871c 0x00300000 -DATA 4 0x53fa8720 0x00300000 -DATA 4 0x53fa8724 0x04000000 -DATA 4 0x53fa8728 0x00300000 -DATA 4 0x53fa872c 0x00300000 -DATA 4 0x63fd9088 0x35343535 -DATA 4 0x63fd9090 0x4d444c44 -DATA 4 0x63fd907c 0x01370138 -DATA 4 0x63fd9080 0x013b013c -DATA 4 0x63fd9018 0x00011740 -DATA 4 0x63fd9000 0xc3190000 -DATA 4 0x63fd900c 0x9f5152e3 -DATA 4 0x63fd9010 0xb68e8a63 -DATA 4 0x63fd9014 0x01ff00db -DATA 4 0x63fd902c 0x000026d2 -DATA 4 0x63fd9030 0x009f0e21 -DATA 4 0x63fd9008 0x12273030 -DATA 4 0x63fd9004 0x0002002d -DATA 4 0x63fd901c 0x00008032 -DATA 4 0x63fd901c 0x00008033 -DATA 4 0x63fd901c 0x00028031 -DATA 4 0x63fd901c 0x052080b0 -DATA 4 0x63fd901c 0x04008040 -DATA 4 0x63fd901c 0x0000803a -DATA 4 0x63fd901c 0x0000803b -DATA 4 0x63fd901c 0x00028039 -DATA 4 0x63fd901c 0x05208138 -DATA 4 0x63fd901c 0x04008048 -DATA 4 0x63fd9020 0x00005800 -DATA 4 0x63fd9040 0x05380003 -DATA 4 0x63fd9058 0x00022227 -DATA 4 0x63fd901C 0x00000000 diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c deleted file mode 100644 index f9ec5ca6ef..0000000000 --- a/board/freescale/mx53ard/mx53ard.c +++ /dev/null @@ -1,319 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2011 Freescale Semiconductor, Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define ETHERNET_INT IMX_GPIO_NR(2, 31) - -DECLARE_GLOBAL_DATA_PTR; - -int dram_init(void) -{ - u32 size1, size2; - - size1 = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); - size2 = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); - - gd->ram_size = size1 + size2; - - return 0; -} -int dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; - - return 0; -} - -#ifdef CONFIG_NAND_MXC -static void setup_iomux_nand(void) -{ - static const iomux_v3_cfg_t nand_pads[] = { - NEW_PAD_CTRL(MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0, - PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1, - PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0, - PAD_CTL_PUS_100K_UP), - NEW_PAD_CTRL(MX53_PAD_NANDF_CLE__EMI_NANDF_CLE, - PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_NANDF_ALE__EMI_NANDF_ALE, - PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B, - PAD_CTL_PUS_100K_UP), - NEW_PAD_CTRL(MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B, - PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B, - PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - }; - - u32 i, reg; - - reg = __raw_readl(M4IF_BASE_ADDR + 0xc); - reg &= ~M4IF_GENP_WEIM_MM_MASK; - __raw_writel(reg, M4IF_BASE_ADDR + 0xc); - for (i = 0x4; i < 0x94; i += 0x18) { - reg = __raw_readl(WEIM_BASE_ADDR + i); - reg &= ~WEIM_GCR2_MUX16_BYP_GRANT_MASK; - __raw_writel(reg, WEIM_BASE_ADDR + i); - } - - imx_iomux_v3_setup_multiple_pads(nand_pads, ARRAY_SIZE(nand_pads)); -} -#else -static void setup_iomux_nand(void) -{ -} -#endif - -#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) - -static void setup_iomux_uart(void) -{ - static const iomux_v3_cfg_t uart_pads[] = { - NEW_PAD_CTRL(MX53_PAD_PATA_DMACK__UART1_RXD_MUX, UART_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DIOW__UART1_TXD_MUX, UART_PAD_CTRL), - }; - - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); -} - -#ifdef CONFIG_FSL_ESDHC_IMX -struct fsl_esdhc_cfg esdhc_cfg[2] = { - {MMC_SDHC1_BASE_ADDR}, - {MMC_SDHC2_BASE_ADDR}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret; - - imx_iomux_v3_setup_pad(MX53_PAD_GPIO_1__GPIO1_1); - gpio_direction_input(IMX_GPIO_NR(1, 1)); - imx_iomux_v3_setup_pad(MX53_PAD_GPIO_4__GPIO1_4); - gpio_direction_input(IMX_GPIO_NR(1, 4)); - - if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR) - ret = !gpio_get_value(IMX_GPIO_NR(1, 1)); - else - ret = !gpio_get_value(IMX_GPIO_NR(1, 4)); - - return ret; -} - -#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ - PAD_CTL_PUS_100K_UP) -#define SD_CLK_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH) -#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \ - PAD_CTL_DSE_HIGH) - -int board_mmc_init(struct bd_info *bis) -{ - static const iomux_v3_cfg_t sd1_pads[] = { - NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_CLK_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL), - }; - - static const iomux_v3_cfg_t sd2_pads[] = { - NEW_PAD_CTRL(MX53_PAD_SD2_CMD__ESDHC2_CMD, SD_CMD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD2_CLK__ESDHC2_CLK, SD_CLK_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD2_DATA0__ESDHC2_DAT0, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD2_DATA1__ESDHC2_DAT1, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD2_DATA2__ESDHC2_DAT2, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD2_DATA3__ESDHC2_DAT3, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA12__ESDHC2_DAT4, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA13__ESDHC2_DAT5, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA14__ESDHC2_DAT6, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA15__ESDHC2_DAT7, SD_PAD_CTRL), - }; - - u32 index; - int ret; - - esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - - for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { - switch (index) { - case 0: - imx_iomux_v3_setup_multiple_pads(sd1_pads, - ARRAY_SIZE(sd1_pads)); - break; - case 1: - imx_iomux_v3_setup_multiple_pads(sd2_pads, - ARRAY_SIZE(sd2_pads)); - break; - default: - printf("Warning: you configured more ESDHC controller" - "(%d) as supported by the board(2)\n", - CONFIG_SYS_FSL_ESDHC_NUM); - return -EINVAL; - } - ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]); - if (ret) - return ret; - } - - return 0; -} -#endif - -static void weim_smc911x_iomux(void) -{ - static const iomux_v3_cfg_t weim_smc911x_pads[] = { - /* Data bus */ - NEW_PAD_CTRL(MX53_PAD_EIM_D16__EMI_WEIM_D_16, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D17__EMI_WEIM_D_17, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D18__EMI_WEIM_D_18, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D19__EMI_WEIM_D_19, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D20__EMI_WEIM_D_20, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D21__EMI_WEIM_D_21, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D22__EMI_WEIM_D_22, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D23__EMI_WEIM_D_23, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D24__EMI_WEIM_D_24, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D25__EMI_WEIM_D_25, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D26__EMI_WEIM_D_26, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D27__EMI_WEIM_D_27, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D28__EMI_WEIM_D_28, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D29__EMI_WEIM_D_29, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D30__EMI_WEIM_D_30, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_D31__EMI_WEIM_D_31, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - - /* Address lines */ - NEW_PAD_CTRL(MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6, - PAD_CTL_PKE | PAD_CTL_DSE_HIGH), - - /* other EIM signals for ethernet */ - MX53_PAD_EIM_OE__EMI_WEIM_OE, - MX53_PAD_EIM_RW__EMI_WEIM_RW, - MX53_PAD_EIM_CS1__EMI_WEIM_CS_1, - }; - - /* ETHERNET_INT as GPIO2_31 */ - imx_iomux_v3_setup_pad(MX53_PAD_EIM_EB3__GPIO2_31); - gpio_direction_input(ETHERNET_INT); - - /* WEIM bus */ - imx_iomux_v3_setup_multiple_pads(weim_smc911x_pads, - ARRAY_SIZE(weim_smc911x_pads)); -} - -static void weim_cs1_settings(void) -{ - struct weim *weim_regs = (struct weim *)WEIM_BASE_ADDR; - - writel(MX53ARD_CS1GCR1, &weim_regs->cs1gcr1); - writel(0x0, &weim_regs->cs1gcr2); - writel(MX53ARD_CS1RCR1, &weim_regs->cs1rcr1); - writel(MX53ARD_CS1RCR2, &weim_regs->cs1rcr2); - writel(MX53ARD_CS1WCR1, &weim_regs->cs1wcr1); - writel(0x0, &weim_regs->cs1wcr2); - writel(0x0, &weim_regs->wcr); - - set_chipselect_size(CS0_64M_CS1_64M); -} - -int board_early_init_f(void) -{ - setup_iomux_nand(); - setup_iomux_uart(); - return 0; -} - -int board_init(void) -{ - /* address of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - return 0; -} - -int board_eth_init(struct bd_info *bis) -{ - int rc = -ENODEV; - - weim_smc911x_iomux(); - weim_cs1_settings(); - -#ifdef CONFIG_SMC911X - rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); -#endif - return rc; -} - -int checkboard(void) -{ - puts("Board: MX53ARD\n"); - - return 0; -} diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig deleted file mode 100644 index 7ccd40e6d9..0000000000 --- a/configs/mx53ard_defconfig +++ /dev/null @@ -1,31 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX5=y -CONFIG_SYS_TEXT_BASE=0x77800000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_OFFSET=0x60000 -CONFIG_TARGET_MX53ARD=y -# CONFIG_CMD_BMODE is not set -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg" -CONFIG_DEFAULT_FDT_FILE="imx53-ard.dtb" -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_FAT=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_FSL_ESDHC_IMX=y -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -CONFIG_SYS_NAND_USE_FLASH_BBT=y -CONFIG_NAND_MXC=y -CONFIG_MII=y -CONFIG_SMC911X=y -CONFIG_SMC911X_BASE=0xF4000000 -CONFIG_MXC_UART=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h deleted file mode 100644 index b613e9816d..0000000000 --- a/include/configs/mx53ard.h +++ /dev/null @@ -1,170 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Freescale Semiconductor, Inc. - * - * Configuration settings for the MX53ARD Freescale board. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD - -#include - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_REVISION_TAG - -#define CONFIG_SYS_FSL_CLK - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI -#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI -#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR -#define CONFIG_SYS_NAND_LARGEPAGE -#define CONFIG_MXC_NAND_HWECC - -#define CONFIG_MXC_UART_BASE UART1_BASE - -/* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ - -/* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 2 - -/* Eth Configs */ -#define CONFIG_HAS_ETH1 - -/* Command definition */ - -#define CONFIG_ETHPRIME "smc911x" - -#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "uimage=zImage\0" \ - "console=ttymxc0\0" \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "fdt_addr=0x78000000\0" \ - "boot_fdt=try\0" \ - "ip_dyn=yes\0" \ - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ - "update_sd_firmware_filename=u-boot.imx\0" \ - "update_sd_firmware=" \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if mmc dev ${mmcdev}; then " \ - "if ${get_cmd} ${update_sd_firmware_filename}; then " \ - "setexpr fw_sz ${filesize} / 0x200; " \ - "setexpr fw_sz ${fw_sz} + 1; " \ - "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ - "fi; " \ - "fi\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${uimage}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" - -#define CONFIG_ARP_TIMEOUT 200UL - -/* Miscellaneous configurable options */ - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -/* Physical Memory Map */ -#define PHYS_SDRAM_1 CSD0_BASE_ADDR -#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) -#define PHYS_SDRAM_2 CSD1_BASE_ADDR -#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) -#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) - -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) -#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) -#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) - -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -/* environment organization */ - -#define MX53ARD_CS1GCR1 (CSEN | DSZ(2)) -#define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22)) -#define MX53ARD_CS1RCR2 RBEN(2) -#define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22)) - -#endif /* __CONFIG_H */