From: Yuantian Tang <andy.tang@nxp.com>
Date: Wed, 19 Jun 2019 06:39:28 +0000 (+0800)
Subject: common: qixis: make the qixis compatible with new soc
X-Git-Tag: v2025.01-rc5-pxa1908~2819^2~42
X-Git-Url: http://git.dujemihanovic.xyz/img/static/gitweb.css?a=commitdiff_plain;h=0f6607f9e9d4638f5d7759c95f4c513e57e3b3dc;p=u-boot.git

common: qixis: make the qixis compatible with new soc

This driver needs modification to work with new soc,
like ls1028, since bitmap of RCFG is changed to
RESV[7:5] LIVE[4] WDEN[3] RESV[2:1] GO[0]
   000      1       0        00      0

Also the RCW location is moved to only dutcfg0.
RESV[7:4] RCWSRC[3:0]
   1111   configurable

Following commands are functional now
qixis_reset
qixis_reset sd
qixis_reset qspi
qixis_reset emmc

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
---

diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
index f1b98bcd2a..1f20223df4 100644
--- a/board/freescale/common/qixis.c
+++ b/board/freescale/common/qixis.c
@@ -21,6 +21,13 @@
 #define QIXIS_LBMAP_BRDCFG_REG 0x00
 #endif
 
+#ifndef QIXIS_RCFG_CTL_RECONFIG_IDLE
+#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
+#endif
+#ifndef QIXIS_RCFG_CTL_RECONFIG_START
+#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
+#endif
+
 #ifdef CONFIG_SYS_I2C_FPGA_ADDR
 u8 qixis_read_i2c(unsigned int reg)
 {
@@ -142,11 +149,13 @@ static void qixis_reset(void)
 	QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET);
 }
 
+#ifdef QIXIS_LBMAP_ALTBANK
 static void qixis_bank_reset(void)
 {
 	QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
 	QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
 }
+#endif
 
 static void __maybe_unused set_lbmap(int lbmap)
 {
@@ -159,12 +168,16 @@ static void __maybe_unused set_lbmap(int lbmap)
 
 static void __maybe_unused set_rcw_src(int rcw_src)
 {
+#ifdef CONFIG_NXP_LSCH3_2
+	QIXIS_WRITE(dutcfg[0], (rcw_src & 0xff));
+#else
 	u8 reg;
 
 	reg = QIXIS_READ(dutcfg[1]);
 	reg = (reg & ~1) | (rcw_src & 1);
 	QIXIS_WRITE(dutcfg[1], reg);
 	QIXIS_WRITE(dutcfg[0], (rcw_src >> 1) & 0xff);
+#endif
 }
 
 static void qixis_dump_regs(void)
@@ -210,16 +223,20 @@ static int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const ar
 		set_lbmap(QIXIS_LBMAP_DFLTBANK);
 		qixis_reset();
 	} else if (strcmp(argv[1], "altbank") == 0) {
+#ifdef QIXIS_LBMAP_ALTBANK
 		set_lbmap(QIXIS_LBMAP_ALTBANK);
 		qixis_bank_reset();
+#else
+		printf("No Altbank!\n");
+#endif
 	} else if (strcmp(argv[1], "nand") == 0) {
 #ifdef QIXIS_LBMAP_NAND
 		QIXIS_WRITE(rst_ctl, 0x30);
 		QIXIS_WRITE(rcfg_ctl, 0);
 		set_lbmap(QIXIS_LBMAP_NAND);
 		set_rcw_src(QIXIS_RCW_SRC_NAND);
-		QIXIS_WRITE(rcfg_ctl, 0x20);
-		QIXIS_WRITE(rcfg_ctl, 0x21);
+		QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
+		QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
 #else
 		printf("Not implemented\n");
 #endif
@@ -233,8 +250,8 @@ static int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const ar
 		set_lbmap(QIXIS_LBMAP_SD);
 		set_rcw_src(QIXIS_RCW_SRC_SD);
 #endif
-		QIXIS_WRITE(rcfg_ctl, 0x20);
-		QIXIS_WRITE(rcfg_ctl, 0x21);
+		QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
+		QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
 #else
 		printf("Not implemented\n");
 #endif
@@ -244,8 +261,8 @@ static int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const ar
 		QIXIS_WRITE(rcfg_ctl, 0);
 		set_lbmap(QIXIS_LBMAP_IFC);
 		set_rcw_src(QIXIS_RCW_SRC_IFC);
-		QIXIS_WRITE(rcfg_ctl, 0x20);
-		QIXIS_WRITE(rcfg_ctl, 0x21);
+		QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
+		QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
 #else
 		printf("Not implemented\n");
 #endif
@@ -255,8 +272,8 @@ static int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const ar
 		QIXIS_WRITE(rcfg_ctl, 0);
 		set_lbmap(QIXIS_LBMAP_EMMC);
 		set_rcw_src(QIXIS_RCW_SRC_EMMC);
-		QIXIS_WRITE(rcfg_ctl, 0x20);
-		QIXIS_WRITE(rcfg_ctl, 0x21);
+		QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
+		QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
 #else
 		printf("Not implemented\n");
 #endif
@@ -266,8 +283,10 @@ static int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const ar
 		QIXIS_WRITE(rcfg_ctl, 0);
 		set_lbmap(QIXIS_LBMAP_SD_QSPI);
 		set_rcw_src(QIXIS_RCW_SRC_SD);
-		qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x20);
-		qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x21);
+		qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+				QIXIS_RCFG_CTL_RECONFIG_IDLE);
+		qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+				QIXIS_RCFG_CTL_RECONFIG_START);
 #else
 		printf("Not implemented\n");
 #endif
@@ -277,8 +296,10 @@ static int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const ar
 		QIXIS_WRITE(rcfg_ctl, 0);
 		set_lbmap(QIXIS_LBMAP_QSPI);
 		set_rcw_src(QIXIS_RCW_SRC_QSPI);
-		qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x20);
-		qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x21);
+		qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+				QIXIS_RCFG_CTL_RECONFIG_IDLE);
+		qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+				QIXIS_RCFG_CTL_RECONFIG_START);
 #else
 		printf("Not implemented\n");
 #endif