From: Jim Liu Date: Tue, 17 Jan 2023 08:59:21 +0000 (+0800) Subject: ARM: dts: npcm8xx: add npcm845 function node X-Git-Url: http://git.dujemihanovic.xyz/img/static/gitweb.css?a=commitdiff_plain;h=04bd6c8997642a2d3b9c74c494f1a0a2a039f17d;p=u-boot.git ARM: dts: npcm8xx: add npcm845 function node Add functaion node list as below: 1. i2c 2. gmac 3. otp 4. aes 5. sha 6. rng 7. serial Signed-off-by: Jim Liu --- diff --git a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi index 4538345dda..fabe5925b7 100644 --- a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi @@ -257,6 +257,364 @@ syscon = <&gcr>; status = "disabled"; }; + + i2c1: i2c@81000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x81000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb1_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c2: i2c@82000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x82000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb2_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c3: i2c@83000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x83000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb3_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c4: i2c@84000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x84000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb4_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c5: i2c@85000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x85000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb5_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c6: i2c@86000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x86000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb6_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c7: i2c@87000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x87000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb7_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c8: i2c@88000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x88000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb8_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c9: i2c@89000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x89000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb9_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c10: i2c@8a000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x8a000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb10_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c11: i2c@8b000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x8b000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb11_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c12: i2c@8c000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x8c000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb12_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c13: i2c@8d000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x8d000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb13_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c14: i2c@8e000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x8e000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb14_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c15: i2c@8f000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0x8f000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb15_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c16: i2c@fff00000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff00000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb16_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c17: i2c@fff01000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff01000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb17_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c18: i2c@fff02000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff02000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb18_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c19: i2c@fff03000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff03000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb19_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c20: i2c@fff04000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff04000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb20_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c21: i2c@fff05000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff05000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb21_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c22: i2c@fff06000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff06000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb22_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c23: i2c@fff07000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff07000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb23_pins>; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c24: i2c@fff08000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff08000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c25: i2c@fff09000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff09000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + syscon = <&gcr>; + status = "disabled"; + }; + + i2c26: i2c@fff0a000 { + compatible = "nuvoton,npcm845-i2c"; + reg = <0xfff0a000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + syscon = <&gcr>; + status = "disabled"; + }; }; }; }; diff --git a/arch/arm/dts/nuvoton-npcm845-evb.dts b/arch/arm/dts/nuvoton-npcm845-evb.dts index 53f4c6aeca..3cab7807e3 100644 --- a/arch/arm/dts/nuvoton-npcm845-evb.dts +++ b/arch/arm/dts/nuvoton-npcm845-evb.dts @@ -11,7 +11,37 @@ aliases { serial0 = &serial0; + ethernet0 = &gmac0; + ethernet1 = &gmac1; + ethernet2 = &gmac2; + ethernet3 = &gmac3; i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c7 = &i2c7; + i2c8 = &i2c8; + i2c9 = &i2c9; + i2c10 = &i2c10; + i2c11 = &i2c11; + i2c12 = &i2c12; + i2c13 = &i2c13; + i2c14 = &i2c14; + i2c15 = &i2c15; + i2c16 = &i2c16; + i2c17 = &i2c17; + i2c18 = &i2c18; + i2c19 = &i2c19; + i2c20 = &i2c20; + i2c21 = &i2c21; + i2c22 = &i2c22; + i2c23 = &i2c23; + i2c24 = &i2c24; + i2c25 = &i2c25; + i2c26 = &i2c26; spi0 = &fiu0; spi1 = &fiu1; spi3 = &fiu3; @@ -106,6 +136,49 @@ status = "okay"; }; +&gmac0 { + phy-mode = "sgmii"; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-gpio = <&gpio5 30 GPIO_ACTIVE_LOW>; /* gpio190 */ + status = "okay"; +}; + +&gmac1 { + phy-mode = "rgmii-id"; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; /* gpio162 */ + status = "okay"; +}; + +&gmac2 { + phy-mode = "NC-SI"; + max-speed = <100>; + use-ncsi; + pinctrl-0 = <&r1_pins + &r1en_pins + &r1oen_pins>; + status = "disabled"; +}; + +&gmac3 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&r2_pins + &r2oen_pins + &r2en_pins + &gpio91o_pins + &gpio92o_pins>; + snps,bitbang-mii; + snps,mdc-gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio91 */ + snps,mdio-gpio = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* gpio92 */ + snps,reset-active-low; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-gpio = <&gpio2 29 GPIO_ACTIVE_LOW>; /* gpio93 */ + status = "okay"; +}; + &spi1 { status = "okay"; }; @@ -142,10 +215,135 @@ phys = <&usbphy3 4>; }; +&rng { + status = "okay"; +}; + +&aes { + status = "okay"; +}; + +&sha { + status = "okay"; +}; + +&otp { + status = "okay"; +}; + &i2c0 { status = "okay"; }; +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; + tmp100@48 { + compatible = "tmp100"; + reg = <0x48>; + status = "okay"; + }; +}; + +&i2c7 { + status = "okay"; +}; + +&i2c8 { + status = "okay"; +}; + +&i2c9 { + status = "okay"; +}; + +&i2c10 { + status = "okay"; +}; + +&i2c11 { + status = "okay"; +}; + +&i2c12 { + status = "okay"; +}; + +&i2c13 { + status = "okay"; +}; + +&i2c14 { + status = "okay"; +}; + +&i2c15 { + status = "okay"; +}; + +&i2c16 { + status = "okay"; +}; + +&i2c17 { + status = "okay"; +}; + +&i2c18 { + status = "okay"; +}; + +&i2c19 { + status = "okay"; +}; + +&i2c20 { + status = "okay"; +}; + +&i2c21 { + status = "okay"; +}; + +&i2c22 { + status = "okay"; +}; + +&i2c23 { + status = "okay"; +}; + +&i2c24 { + status = "okay"; +}; + +&i2c25 { + status = "okay"; +}; + +&i2c26 { + status = "okay"; +}; + &pinctrl { pinctrl-names = "default"; pinctrl-0 = < diff --git a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi index d21e5042a6..be2ad0cf6c 100644 --- a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi +++ b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi @@ -59,6 +59,68 @@ clocks = <&clk_refclk>; }; + gmac0: eth@f0802000 { + device_type = "network"; + compatible = "nuvoton,npcm-dwmac", "st,stm32-dwmac"; + reg = <0x0 0xf0802000 0x0 0x2000>, + <0x0 0xf0780000 0x0 0x200>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "stmmaceth"; + pinctrl-names = "default"; + pinctrl-0 = <&rg1mdio_pins>; + resets = <&rstc2 NPCM8XX_RESET_GMAC1>; + status = "disabled"; + }; + + gmac1: eth@f0804000 { + device_type = "network"; + compatible = "nuvoton,npcm-dwmac", "st,stm32-dwmac"; + reg = <0x0 0xf0804000 0x0 0x2000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "stmmaceth"; + pinctrl-names = "default"; + pinctrl-0 = <&rg2_pins + &rg2mdio_pins>; + resets = <&rstc2 NPCM8XX_RESET_GMAC2>; + status = "disabled"; + }; + + gmac2: eth@f0806000 { + device_type = "network"; + compatible = "nuvoton,npcm-dwmac", "st,stm32-dwmac"; + reg = <0x0 0xf0806000 0x0 0x2000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "stmmaceth"; + pinctrl-names = "default"; + pinctrl-0 = <&r1_pins + &r1err_pins + &r1md_pins>; + resets = <&rstc1 NPCM8XX_RESET_GMAC3>; + status = "disabled"; + }; + + gmac3: eth@f0808000 { + device_type = "network"; + compatible = "nuvoton,npcm-dwmac", "st,stm32-dwmac"; + reg = <0x0 0xf0808000 0x0 0x2000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "stmmaceth"; + pinctrl-names = "default"; + pinctrl-0 = <&r2_pins + &r2err_pins + &r2md_pins>; + resets = <&rstc1 NPCM8XX_RESET_GMAC4>; + status = "disabled"; + }; + ehci1: usb@f0828100 { compatible = "nuvoton,npcm845-ehci"; reg = <0x0 0xf0828100 0x0 0x1000>; @@ -236,6 +298,49 @@ status = "disabled"; }; + serial1: serial@1000 { + compatible = "nuvoton,npcm845-uart"; + reg = <0x1000 0x1000>; + clocks = <&clk NPCM8XX_CLK_UART>, <&clk NPCM8XX_CLK_PLL2DIV2>; + status = "disabled"; + }; + + serial2: serial@2000 { + compatible = "nuvoton,npcm845-uart"; + reg = <0x2000 0x1000>; + clocks = <&clk NPCM8XX_CLK_UART>, <&clk NPCM8XX_CLK_PLL2DIV2>; + status = "disabled"; + }; + + serial3: serial@3000 { + compatible = "nuvoton,npcm845-uart"; + reg = <0x3000 0x1000>; + clocks = <&clk NPCM8XX_CLK_UART>, <&clk NPCM8XX_CLK_PLL2DIV2>; + status = "disabled"; + }; + + serial4: serial@4000 { + compatible = "nuvoton,npcm845-uart"; + reg = <0x4000 0x1000>; + clocks = <&clk NPCM8XX_CLK_UART2>, <&clk NPCM8XX_CLK_PLL2DIV2>; + status = "disabled"; + }; + + serial5: serial@5000 { + compatible = "nuvoton,npcm845-uart"; + reg = <0x5000 0x1000>; + clocks = <&clk NPCM8XX_CLK_UART2>, <&clk NPCM8XX_CLK_PLL2DIV2>; + status = "disabled"; + }; + + serial6: serial@6000 { + compatible = "nuvoton,npcm845-uart"; + reg = <0x6000 0x1000>; + clocks = <&clk NPCM8XX_CLK_UART2>, <&clk NPCM8XX_CLK_PLL2DIV2>; + interrupts = ; + status = "disabled"; + }; + gpio0: gpio0@10000 { compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio"; reg = <0x10000 0xB0>; @@ -299,6 +404,35 @@ gpio-controller; gpio-bank-name = "gpio7"; }; + + rng: rng@b000 { + compatible = "nuvoton,npcm845-rng"; + reg = <0xb000 0x8>; + status = "disabled"; + }; + + otp: otp@189000 { + compatible = "nuvoton,npcm845-otp"; + reg = <0x189000 0x1000>; + status = "disabled"; + }; + + aes: aes@f0858000 { + compatible = "nuvoton,npcm845-aes"; + reg = <0x0 0xf0858000 0x0 0x1000>, + <0x0 0xf0851000 0x0 0x1000>; + status = "disabled"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "clk_ahb"; + }; + + sha:sha@f085a000 { + compatible = "nuvoton,npcm845-sha"; + reg = <0x0 0xf085a000 0x0 0x1000>; + status = "disabled"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "clk_ahb"; + }; }; }; pinctrl: pinctrl@f0800000 {