From: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Date: Tue, 4 Aug 2020 06:24:04 +0000 (-0700)
Subject: arm64: zynqmp: Add device tree node for 2nd mux on I2C1 bus
X-Git-Url: http://git.dujemihanovic.xyz/img/static/gitweb.css?a=commitdiff_plain;h=02abe1fbf3a8b7a6e50a5ed60d3b413a58775502;p=u-boot.git

arm64: zynqmp: Add device tree node for 2nd mux on I2C1 bus

There is 2nd pca9548 mux on I2C1 bus that controls SFP0, SFP1, and QSFP1
ports. Channel 0 and 1 are connected to J287 connector for SFP0 & SFP1, and
channel 2 is connected to J288 connector for QSFP1.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
index a8bbb14f6c..b81919e319 100644
--- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
@@ -554,6 +554,31 @@
 			reg = <7>;
 		};
 	};
+	i2c-mux@75 { /* u214 */
+		compatible = "nxp,pca9548";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x75>;
+		i2c@0 { /* SFP0_IIC */
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+			/* SFP0 */
+		};
+		i2c@1 { /* SFP1_IIC */
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+			/* SFP1 */
+		};
+		i2c@2 { /* QSFP1_I2C */
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+			/* QSFP1 */
+		};
+		/* 3 - 7 unused */
+	};
 };
 
 &xilinx_ams {