Give this function a slightly easier name.
Signed-off-by: Simon Glass <sjg@chromium.org>
}
nand = &chip->nand;
- nand->options = spl_in_proper() ? 0 : NAND_SKIP_BBTSCAN;
+ nand->options = not_xpl() ? 0 : NAND_SKIP_BBTSCAN;
nand->flash_node = np;
nand->dev_ready = sand_nand_dev_ready;
nand->cmdfunc = sand_nand_command;
return xpl_phase() == PHASE_TPL ||
(!IS_ENABLED(CONFIG_TPL) &&
!IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL) &&
- !spl_in_proper());
+ !not_xpl());
}
static struct io_setting *
struct ns16550_plat *plat = com_port->plat;
/* save code size */
- if (!spl_in_proper())
+ if (!not_xpl())
return -ENOSYS;
info->type = SERIAL_CHIP_16550_COMPATIBLE;
struct clk clk;
int err;
- addr = spl_in_proper() ? dev_read_addr_size(dev, &size) :
+ addr = not_xpl() ? dev_read_addr_size(dev, &size) :
dev_read_addr(dev);
err = ns16550_serial_assign_base(plat, addr, size);
if (err && !device_is_on_pci_bus(dev))
#endif
}
-/* returns true if in U-Boot proper, false if in SPL */
-static inline bool spl_in_proper(void)
+/* returns true if in U-Boot proper, false if in xPL */
+static inline bool not_xpl(void)
{
#ifdef CONFIG_SPL_BUILD
return false;