]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
spi: mt7621-spi: use clock frequency from clk driver
authorWeijie Gao <weijie.gao@mediatek.com>
Wed, 25 Sep 2019 09:45:23 +0000 (17:45 +0800)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Fri, 25 Oct 2019 15:20:44 +0000 (17:20 +0200)
This patch lets the spi driver to use clock provided by the clk driver
since the new clk-mt7628 driver provides accurate sys clock frequency.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
drivers/spi/mt7621_spi.c

index 107e58f657b8962a42c398c993beeb6fe34b64fe..b37f859b98210127a8fabf9a61f8c63042d9d437 100644 (file)
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <clk.h>
 #include <dm.h>
 #include <spi.h>
 #include <wait_bit.h>
@@ -266,19 +267,24 @@ static int mt7621_spi_xfer(struct udevice *dev, unsigned int bitlen,
 static int mt7621_spi_probe(struct udevice *dev)
 {
        struct mt7621_spi *rs = dev_get_priv(dev);
+       struct clk clk;
+       int ret;
 
        rs->base = dev_remap_addr(dev);
        if (!rs->base)
                return -EINVAL;
 
-       /*
-        * Read input clock via DT for now. At some point this should be
-        * replaced by implementing a clock driver for this SoC and getting
-        * the SPI frequency via this clock driver.
-        */
-       rs->sys_freq = dev_read_u32_default(dev, "clock-frequency", 0);
+       ret = clk_get_by_index(dev, 0, &clk);
+       if (ret < 0) {
+               printf("Please provide a clock!\n");
+               return ret;
+       }
+
+       clk_enable(&clk);
+
+       rs->sys_freq = clk_get_rate(&clk);
        if (!rs->sys_freq) {
-               printf("Please provide clock-frequency!\n");
+               printf("Please provide a valid clock!\n");
                return -EINVAL;
        }