]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm64: zynqmp: Update rproc node
authorMichal Simek <michal.simek@amd.com>
Thu, 30 May 2024 10:39:23 +0000 (12:39 +0200)
committerMichal Simek <michal.simek@amd.com>
Mon, 17 Jun 2024 14:02:29 +0000 (16:02 +0200)
remoteproc node should be updated to be aligned with the latest dt-schema.

Reviewed-by: Tanmay Shah <tanmay.shah@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d8247a46f486a612f85767de9b832ad33fa980fe.1717065556.git.michal.simek@amd.com
arch/arm/dts/zynqmp.dtsi
include/dt-bindings/power/xlnx-zynqmp-power.h

index 53a606c340a45817ef3ab55fed6239aa394f7ea0..34f592c1a85f18a21c117d99042431db2fa491a3 100644 (file)
                ranges;
        };
 
-       remoteproc {
+       rproc_lockstep: remoteproc@ffe00000 {
                compatible = "xlnx,zynqmp-r5fss";
                xlnx,cluster-mode = <1>;
+               xlnx,tcm-mode = <1>;
 
-               r5f-0 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+
+               ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
+                        <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
+                        <0x0 0x10000 0x0 0xffe10000 0x0 0x10000>,
+                        <0x0 0x30000 0x0 0xffe30000 0x0 0x10000>;
+
+               r5f@0 {
+                       compatible = "xlnx,zynqmp-r5f";
+                       reg = <0x0 0x0 0x0 0x10000>,
+                             <0x0 0x20000 0x0 0x10000>,
+                             <0x0 0x10000 0x0 0x10000>,
+                             <0x0 0x30000 0x0 0x10000>;
+                       reg-names = "atcm0", "btcm0", "atcm1", "btcm1";
+                       power-domains = <&zynqmp_firmware PD_RPU_0>,
+                                       <&zynqmp_firmware PD_R5_0_ATCM>,
+                                       <&zynqmp_firmware PD_R5_0_BTCM>,
+                                       <&zynqmp_firmware PD_R5_1_ATCM>,
+                                       <&zynqmp_firmware PD_R5_1_BTCM>;
+                       memory-region = <&rproc_0_fw_image>;
+               };
+
+               r5f@1 {
+                       compatible = "xlnx,zynqmp-r5f";
+                       reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
+                       reg-names = "atcm0", "btcm0";
+                       power-domains = <&zynqmp_firmware PD_RPU_1>,
+                                       <&zynqmp_firmware PD_R5_1_ATCM>,
+                                       <&zynqmp_firmware PD_R5_1_BTCM>;
+                       memory-region = <&rproc_1_fw_image>;
+               };
+       };
+
+       rproc_split: remoteproc-split@ffe00000 {
+               status = "disabled";
+               compatible = "xlnx,zynqmp-r5fss";
+               xlnx,cluster-mode = <0>;
+               xlnx,tcm-mode = <0>;
+
+               #address-cells = <2>;
+               #size-cells = <2>;
+
+               ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
+                        <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
+                        <0x1 0x0 0x0 0xffe90000 0x0 0x10000>,
+                        <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>;
+
+               r5f@0 {
                        compatible = "xlnx,zynqmp-r5f";
-                       power-domains = <&zynqmp_firmware PD_RPU_0>;
+                       reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>;
+                       reg-names = "atcm0", "btcm0";
+                       power-domains = <&zynqmp_firmware PD_RPU_0>,
+                                       <&zynqmp_firmware PD_R5_0_ATCM>,
+                                       <&zynqmp_firmware PD_R5_0_BTCM>;
                        memory-region = <&rproc_0_fw_image>;
                };
 
-               r5f-1 {
+               r5f@1 {
                        compatible = "xlnx,zynqmp-r5f";
-                       power-domains = <&zynqmp_firmware PD_RPU_1>;
+                       reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
+                       reg-names = "atcm0", "btcm0";
+                       power-domains = <&zynqmp_firmware PD_RPU_1>,
+                                       <&zynqmp_firmware PD_R5_1_ATCM>,
+                                       <&zynqmp_firmware PD_R5_1_BTCM>;
                        memory-region = <&rproc_1_fw_image>;
                };
        };
index e7eb0960480aea8f19765d85e742a556b2965777..618024cbb20dc65dc6790599435d18d33542cefd 100644 (file)
@@ -6,16 +6,12 @@
 #ifndef _DT_BINDINGS_ZYNQMP_POWER_H
 #define _DT_BINDINGS_ZYNQMP_POWER_H
 
-#define                PD_RPU_0        6
-#define                PD_RPU_1        7
-#define                PD_OCM_BANK_0   11
-#define                PD_OCM_BANK_1   12
-#define                PD_OCM_BANK_2   13
-#define                PD_OCM_BANK_3   14
-#define                PD_TCM_BANK_0   15
-#define                PD_TCM_BANK_1   16
-#define                PD_TCM_BANK_2   17
-#define                PD_TCM_BANK_3   18
+#define                PD_RPU_0        7
+#define                PD_RPU_1        8
+#define                PD_R5_0_ATCM    15
+#define                PD_R5_0_BTCM    16
+#define                PD_R5_1_ATCM    17
+#define                PD_R5_1_BTCM    18
 #define                PD_USB_0        22
 #define                PD_USB_1        23
 #define                PD_TTC_0        24
@@ -45,6 +41,5 @@
 #define                PD_CAN_1        48
 #define                PD_GPU          58
 #define                PD_PCIE         59
-#define                PD_PL           69
 
 #endif