i.MX7ULP: Fix SPLL/APLL clock rate calculation issue

The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c
index 85d726fe30dcdd095aed65bb3ff7b72d29f63028..a28a2bc81b8345c81f3738b78909c5a391424489 100644 (file)
--- a/arch/arm/mach-imx/mx7ulp/scg.c
+++ b/arch/arm/mach-imx/mx7ulp/scg.c
@@ -503,7 +503,10 @@ u32 decode_pll(enum pll_clocks pll)
 
                infreq = infreq / pre_div;
 
-               return infreq * mult + infreq * num / denom;
+               if (denom)
+                       return infreq * mult + infreq * num / denom;
+               else
+                       return infreq * mult;
 
        case PLL_A7_APLL:
                reg = readl(&scg1_regs->apllcsr);
@@ -532,7 +535,10 @@ u32 decode_pll(enum pll_clocks pll)
 
                infreq = infreq / pre_div;
 
-               return infreq * mult + infreq * num / denom;
+               if (denom)
+                       return infreq * mult + infreq * num / denom;
+               else
+                       return infreq * mult;
 
        case PLL_USB:
                reg = readl(&scg1_regs->upllcsr);