If defined, a function that provides delays in the FPGA
configuration driver.
- CONFIG_SYS_FPGA_CHECK_CTRLC
- Allow Control-C to interrupt FPGA configuration
-
CONFIG_SYS_FPGA_CHECK_ERROR
Check for configuration errors during FPGA bitfile
Enable FPGA driver for loading bitstream in BIT and BIN format
on Xilinx Zynq devices.
+config SYS_FPGA_CHECK_CTRLC
+ bool "Allow Control-C to interrupt FPGA configuration"
+ depends on FPGA
+ help
+ User can interrupt FPGA configuration by pressing CTRL+C.
+
endmenu
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
#endif
-/*
- * Don't allow config cycle to be interrupted
- */
-#ifndef CONFIG_SYS_FPGA_CHECK_CTRLC
-#undef CONFIG_SYS_FPGA_CHECK_CTRLC
-#endif
-
/*
* Check for errors during configuration by default
*/