ARM: omap4: add platform specific info for GPMC and ELM controllers

This patch moves platform specific information for GPMC and ELM controller
into separate header files, so that any derivative devices do not mess other
header files.

Platform specific information added into arch-xx/../hardware.h
 - CPU related platform specific details like base-address of GPMC and ELM

Platform specific information added into arch-xx/../mem.h
 - Generic configs for GPMC and ELM initialization.
 - Hardware parameters or constrains specific to GPMC and ELM IP like;
   number of max number of chip-selects available

Signed-off-by: Pekon Gupta <pekon@ti.com>

diff --git a/arch/arm/include/asm/arch-omap4/cpu.h b/arch/arm/include/asm/arch-omap4/cpu.h
index c21fb54714a5055f4afde4b765a892e796948ec9..f7595ae5776440e9bd59d2214ffb87cdbc087481 100644 (file)
--- a/arch/arm/include/asm/arch-omap4/cpu.h
+++ b/arch/arm/include/asm/arch-omap4/cpu.h
@@ -12,6 +12,8 @@
 #include <asm/types.h>
 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
 
+#include <asm/arch/hardware.h>
+
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__
 struct gptimer {
@@ -57,9 +59,6 @@ struct watchdog {
 #define TCLR_AR                        (0x1 << 1)
 #define TCLR_PRE               (0x1 << 5)
 
-/* GPMC BASE */
-#define GPMC_BASE              (OMAP44XX_GPMC_BASE)
-
 /* I2C base */
 #define I2C_BASE1              (OMAP44XX_L4_PER_BASE + 0x70000)
 #define I2C_BASE2              (OMAP44XX_L4_PER_BASE + 0x72000)

diff --git a/arch/arm/include/asm/arch-omap4/hardware.h b/arch/arm/include/asm/arch-omap4/hardware.h
new file mode 100644 (file)
index 0000000..f7011b4
--- /dev/null
+++ b/arch/arm/include/asm/arch-omap4/hardware.h
@@ -0,0 +1,26 @@
+/*
+ * hardware.h
+ *
+ * hardware specific header
+ *
+ * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __OMAP_HARDWARE_H
+#define __OMAP_HARDWARE_H
+
+#include <asm/arch/omap.h>
+
+/*
+ * Common hardware definitions
+ */
+
+/* BCH Error Location Module */
+#define ELM_BASE                       0x48078000
+
+/* GPMC Base address */
+#define GPMC_BASE                      0x50000000
+
+#endif

diff --git a/arch/arm/include/asm/arch-omap4/mem.h b/arch/arm/include/asm/arch-omap4/mem.h
new file mode 100644 (file)
index 0000000..d2e708b
--- /dev/null
+++ b/arch/arm/include/asm/arch-omap4/mem.h
@@ -0,0 +1,62 @@
+/*
+ * (C) Copyright 2006-2008
+ * Texas Instruments, <www.ti.com>
+ *
+ * Author
+ *             Mansoor Ahamed <mansoor.ahamed@ti.com>
+ *
+ * Initial Code from:
+ *             Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _MEM_H_
+#define _MEM_H_
+
+/*
+ * GPMC settings -
+ * Definitions is as per the following format
+ * #define <PART>_GPMC_CONFIG<x> <value>
+ * Where:
+ * PART is the part name e.g. STNOR - Intel Strata Flash
+ * x is GPMC config registers from 1 to 6 (there will be 6 macros)
+ * Value is corresponding value
+ *
+ * For every valid PRCM configuration there should be only one definition of
+ * the same. if values are independent of the board, this definition will be
+ * present in this file if values are dependent on the board, then this should
+ * go into corresponding mem-boardName.h file
+ *
+ * Currently valid part Names are (PART):
+ * M_NAND - Micron NAND
+ * STNOR - STMicrolelctronics M29W128GL
+ */
+#define GPMC_SIZE_256M         0x0
+#define GPMC_SIZE_128M         0x8
+#define GPMC_SIZE_64M          0xC
+#define GPMC_SIZE_32M          0xE
+#define GPMC_SIZE_16M          0xF
+
+#define M_NAND_GPMC_CONFIG1    0x00000800
+#define M_NAND_GPMC_CONFIG2    0x001e1e00
+#define M_NAND_GPMC_CONFIG3    0x001e1e00
+#define M_NAND_GPMC_CONFIG4    0x16051807
+#define M_NAND_GPMC_CONFIG5    0x00151e1e
+#define M_NAND_GPMC_CONFIG6    0x16000f80
+#define M_NAND_GPMC_CONFIG7    0x00000008
+
+#define STNOR_GPMC_CONFIG1     0x00001200
+#define STNOR_GPMC_CONFIG2     0x00101000
+#define STNOR_GPMC_CONFIG3     0x00030301
+#define STNOR_GPMC_CONFIG4     0x10041004
+#define STNOR_GPMC_CONFIG5     0x000C1010
+#define STNOR_GPMC_CONFIG6     0x08070280
+#define STNOR_GPMC_CONFIG7     0x00000F48
+
+/* max number of GPMC Chip Selects */
+#define GPMC_MAX_CS            8
+/* max number of GPMC regs */
+#define GPMC_MAX_REG           7
+
+#endif /* endif _MEM_H_ */

diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index f66da0d603489abd7eeeda8f5462bbfd5a0dd529..d43dc265cd68f952897d07b39fbf691fbe281fdf 100644 (file)
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -60,9 +60,6 @@
 /* Watchdog Timer2 - MPU watchdog */
 #define WDT2_BASE              (OMAP44XX_L4_WKUP_BASE + 0x14000)
 
-/* GPMC */
-#define OMAP44XX_GPMC_BASE     0x50000000
-
 /*
  * Hardware Register Details
  */