QIXIS_RCFG_CTL_RECONFIG_START);
#else
printf("Not implemented\n");
+#endif
+ } else if (strcmp(argv[1], "xspi") == 0) {
+#ifdef QIXIS_LBMAP_XSPI
+ QIXIS_WRITE(rst_ctl, 0x30);
+ QIXIS_WRITE(rcfg_ctl, 0);
+ set_lbmap(QIXIS_LBMAP_XSPI);
+ set_rcw_src(QIXIS_RCW_SRC_XSPI);
+ qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+ QIXIS_RCFG_CTL_RECONFIG_IDLE);
+ qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+ QIXIS_RCFG_CTL_RECONFIG_START);
+#else
+ printf("Not implemented\n");
#endif
} else if (strcmp(argv[1], "watchdog") == 0) {
static char *period[9] = {"2s", "4s", "8s", "16s", "32s",
#define QIXIS_LBMAP_ALTBANK 0x00
#define QIXIS_LBMAP_SD 0x00
#define QIXIS_LBMAP_EMMC 0x00
-#define QIXIS_LBMAP_QSPI 0x00
+#define QIXIS_LBMAP_XSPI 0x00
#define QIXIS_RCW_SRC_SD 0xf8
#define QIXIS_RCW_SRC_EMMC 0xf9
-#define QIXIS_RCW_SRC_QSPI 0xff
+#define QIXIS_RCW_SRC_XSPI 0xff
#define QIXIS_RST_CTL_RESET 0x31
#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x10
#define QIXIS_RCFG_CTL_RECONFIG_START 0x11