ARM: uniphier: adjust ifdefs for new UniPhier DWC3 CONFIG

Now USB 3.0 feature is enabled/disabled by CONFIG_USB_DWC3_UNIPHIER.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c
index 19be4f3145c8b66a8cba5217f4753bd3a650f746..8a978d20ffa65da7d635ac22357b516ff911e1c5 100644 (file)
--- a/arch/arm/mach-uniphier/clk/clk-pro4.c
+++ b/arch/arm/mach-uniphier/clk/clk-pro4.c
@@ -17,7 +17,7 @@ void uniphier_pro4_clk_init(void)
 
        /* deassert reset */
        tmp = readl(SC_RSTCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
        tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
                SC_RSTCTRL_NRST_GIO;
 #endif
@@ -30,7 +30,7 @@ void uniphier_pro4_clk_init(void)
        writel(tmp, SC_RSTCTRL);
        readl(SC_RSTCTRL); /* dummy read */
 
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
        tmp = readl(SC_RSTCTRL2);
        tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1;
        writel(tmp, SC_RSTCTRL2);
@@ -39,7 +39,7 @@ void uniphier_pro4_clk_init(void)
 
        /* provide clocks */
        tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
        tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
                SC_CLKCTRL_CEN_GIO;
 #endif

diff --git a/arch/arm/mach-uniphier/clk/clk-pro5.c b/arch/arm/mach-uniphier/clk/clk-pro5.c
index 823bb063732de612b9bcbdc97300b187fb41eb67..dd86cadf5bfba4c7ed75320ef3a1cfbf20837d36 100644 (file)
--- a/arch/arm/mach-uniphier/clk/clk-pro5.c
+++ b/arch/arm/mach-uniphier/clk/clk-pro5.c
@@ -15,7 +15,7 @@ void uniphier_pro5_clk_init(void)
 
        /* deassert reset */
        tmp = readl(SC_RSTCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
        tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
 #endif
 #ifdef CONFIG_NAND_DENALI
@@ -24,7 +24,7 @@ void uniphier_pro5_clk_init(void)
        writel(tmp, SC_RSTCTRL);
        readl(SC_RSTCTRL); /* dummy read */
 
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
        tmp = readl(SC_RSTCTRL2);
        tmp |= SC_RSTCTRL2_NRST_USB3B1;
        writel(tmp, SC_RSTCTRL2);
@@ -33,7 +33,7 @@ void uniphier_pro5_clk_init(void)
 
        /* provide clocks */
        tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
        tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
                SC_CLKCTRL_CEN_GIO;
 #endif

diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c
index 0d9240519c2525ac5293b29d94293b1ecd3e0d77..9775127650a72e8c56fc9fa2cf7af243b8ed9406 100644 (file)
--- a/arch/arm/mach-uniphier/clk/clk-pxs2.c
+++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c
@@ -16,7 +16,7 @@ void uniphier_pxs2_clk_init(void)
 
        /* deassert reset */
        tmp = readl(SC_RSTCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
        tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
 #endif
 #ifdef CONFIG_UNIPHIER_ETH
@@ -28,7 +28,7 @@ void uniphier_pxs2_clk_init(void)
        writel(tmp, SC_RSTCTRL);
        readl(SC_RSTCTRL); /* dummy read */
 
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
        tmp = readl(SC_RSTCTRL2);
        tmp |= SC_RSTCTRL2_NRST_USB3B1;
        writel(tmp, SC_RSTCTRL2);
@@ -41,7 +41,7 @@ void uniphier_pxs2_clk_init(void)
 
        /* provide clocks */
        tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_USB_XHCI_UNIPHIER
+#ifdef CONFIG_USB_DWC3_UNIPHIER
        tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
                SC_CLKCTRL_CEN_GIO;
 #endif