#
# SPDX-License-Identifier: GPL-2.0+
#
-
+obj-y += soc.o
obj-$(CONFIG_STM32F4) += stm32f4/
obj-$(CONFIG_STM32F7) += stm32f7/
-obj-$(CONFIG_STM32H7) += stm32h7/
#include <asm/io.h>
#include <asm/armv7m_mpu.h>
-u32 get_cpu_rev(void)
-{
- return 0;
-}
-
int arch_cpu_init(void)
{
int i;
{ 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
O_I_WB_RD_WR_ALLOC, REGION_4GB },
- /* Code area, executable & strongly ordered */
- { 0xD0000000, REGION_1, XN_EN, PRIV_RW_USR_RW,
- STRONG_ORDER, REGION_8MB },
+ /* armv7m code area */
+ { 0x00000000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
+ STRONG_ORDER, REGION_512MB },
- /* Device area in all H7 : Not executable */
+ /* Device area : Not executable */
{ 0x40000000, REGION_2, XN_EN, PRIV_RW_USR_RW,
DEVICE_NON_SHARED, REGION_512MB },
* Armv7m fixed configuration: strongly ordered & not
* executable, not cacheable
*/
- { 0xE0000000, REGION_4, XN_EN, PRIV_RW_USR_RW,
+ { 0xE0000000, REGION_3, XN_EN, PRIV_RW_USR_RW,
STRONG_ORDER, REGION_512MB },
+
+#if !defined(CONFIG_STM32H7)
+ /* Device area : Not executable */
+ { 0xA0000000, REGION_4, XN_EN, PRIV_RW_USR_RW,
+ DEVICE_NON_SHARED, REGION_512MB },
+#endif
};
disable_mpu();
return 0;
}
-
-void s_init(void)
-{
-}
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += soc.o clock.o timer.o
+obj-y += clock.o timer.o
+++ /dev/null
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/armv7m_mpu.h>
-#include <asm/arch/stm32.h>
-
-u32 get_cpu_rev(void)
-{
- return 0;
-}
-
-int arch_cpu_init(void)
-{
- struct mpu_region_config stm32_region_config[] = {
- { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
- STRONG_ORDER, REGION_4GB },
- };
- int i;
-
- configure_clocks();
- /*
- * Configure the memory protection unit (MPU) to allow full access to
- * the whole 4GB address space.
- */
- disable_mpu();
- for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
- mpu_config(&stm32_region_config[i]);
- enable_mpu();
-
- return 0;
-}
-
-void s_init(void)
-{
-}
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += timer.o soc.o
+obj-y += timer.o
+++ /dev/null
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/armv7m_mpu.h>
-#include <asm/arch/stm32.h>
-
-u32 get_cpu_rev(void)
-{
- return 0;
-}
-
-int arch_cpu_init(void)
-{
- int i;
-
- struct mpu_region_config stm32_region_config[] = {
- { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
- O_I_WB_RD_WR_ALLOC, REGION_4GB },
-
- { 0x00000000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
- STRONG_ORDER, REGION_512MB },
-
- { 0x40000000, REGION_2, XN_EN, PRIV_RW_USR_RW,
- DEVICE_NON_SHARED, REGION_512MB },
-
- { 0xA0000000, REGION_3, XN_EN, PRIV_RW_USR_RW,
- DEVICE_NON_SHARED, REGION_512MB },
-
- { 0xE0000000, REGION_4, XN_EN, PRIV_RW_USR_RW,
- STRONG_ORDER, REGION_512MB },
- };
-
- disable_mpu();
- for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
- mpu_config(&stm32_region_config[i]);
- enable_mpu();
-
- return 0;
-}
-
-void s_init(void)
-{
-}
+++ /dev/null
-#
-# Copyright (C) 2017, STMicroelectronics - All Rights Reserved
-# Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += soc.o
{
int res;
+ configure_clocks();
+
res = uart_setup_gpio();
if (res)
return res;