board: freescale: ls2080rdb: remove code under !CONFIG_DM_ETH

Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index 7034bc6e5d21465f8683e84a6a617c78ab369a62..44d9782d729f5000a1a758c0ee09c82808991a90 100644 (file)
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -4,104 +4,13 @@
  *
  */
 
-#include <common.h>
-#include <command.h>
-#include <net.h>
-#include <netdev.h>
-#include <malloc.h>
-#include <fsl_mdio.h>
-#include <miiphy.h>
-#include <phy.h>
-#include <fm_eth.h>
-#include <asm/global_data.h>
-#include <asm/io.h>
 #include <exports.h>
-#include <asm/arch/fsl_serdes.h>
 #include <fsl-mc/fsl_mc.h>
-#include <fsl-mc/ldpaa_wriop.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 int board_eth_init(struct bd_info *bis)
 {
-#ifndef CONFIG_DM_ETH
-#if defined(CONFIG_FSL_MC_ENET)
-       int i, interface;
-       struct memac_mdio_info mdio_info;
-       struct mii_dev *dev;
-       struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
-       u32 srds_s1;
-       struct memac_mdio_controller *reg;
-
-       srds_s1 = in_le32(&gur->rcwsr[28]) &
-                               FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK;
-       srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT;
-
-       reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO1;
-       mdio_info.regs = reg;
-       mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME;
-
-       /* Register the EMI 1 */
-       fm_memac_mdio_init(bis, &mdio_info);
-
-       reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO2;
-       mdio_info.regs = reg;
-       mdio_info.name = DEFAULT_WRIOP_MDIO2_NAME;
-
-       /* Register the EMI 2 */
-       fm_memac_mdio_init(bis, &mdio_info);
-
-       switch (srds_s1) {
-       case 0x2A:
-               wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1);
-               wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2);
-               wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3);
-               wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4);
-               wriop_set_phy_address(WRIOP1_DPMAC5, 0, AQ_PHY_ADDR1);
-               wriop_set_phy_address(WRIOP1_DPMAC6, 0, AQ_PHY_ADDR2);
-               wriop_set_phy_address(WRIOP1_DPMAC7, 0, AQ_PHY_ADDR3);
-               wriop_set_phy_address(WRIOP1_DPMAC8, 0, AQ_PHY_ADDR4);
-
-               break;
-       case 0x4B:
-               wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1);
-               wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2);
-               wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3);
-               wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4);
-
-               break;
-       default:
-               printf("SerDes1 protocol 0x%x is not supported on LS2080aRDB\n",
-                      srds_s1);
-               break;
-       }
-
-       for (i = WRIOP1_DPMAC1; i <= WRIOP1_DPMAC4; i++) {
-               interface = wriop_get_enet_if(i);
-               switch (interface) {
-               case PHY_INTERFACE_MODE_XGMII:
-                       dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME);
-                       wriop_set_mdio(i, dev);
-                       break;
-               default:
-                       break;
-               }
-       }
-
-       for (i = WRIOP1_DPMAC5; i <= WRIOP1_DPMAC8; i++) {
-               switch (wriop_get_enet_if(i)) {
-               case PHY_INTERFACE_MODE_XGMII:
-                       dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME);
-                       wriop_set_mdio(i, dev);
-                       break;
-               default:
-                       break;
-               }
-       }
-
-       cpu_eth_init(bis);
-#endif /* CONFIG_FSL_MC_ENET */
-#endif /* !CONFIG_DM_ETH */
 
 #ifdef CONFIG_PHY_AQUANTIA
        /*
@@ -116,11 +25,7 @@ int board_eth_init(struct bd_info *bis)
        gd->jt->miiphy_set_current_dev = miiphy_set_current_dev;
 #endif
 
-#ifdef CONFIG_DM_ETH
        return 0;
-#else
-       return pci_eth_init(bis);
-#endif
 }
 
 #if defined(CONFIG_RESET_PHY_R)

diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index aa2d65b45b8944a71ce2d4bcb75a196d72db72b3..a7fc2b20766073a8127947f95f39356ccfe7a9cc 100644 (file)
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -297,7 +297,7 @@ int board_init(void)
        out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK);
 #endif
 
-#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT)
        pci_init();
 #endif