powerpc/mpc85xx: Clear L1 D-cache lock

dcbi instruction has been used to clear D-cache lock. However, the cache
lock is persistent for e6500 core. Use dcblc to clear the lock explicitly.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index e413e4ae99266e3503a9d0ed9b26ce0f99bb61e4..4f0480b768960e9d0913bd1ae6fba8d36e920476 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1906,6 +1906,7 @@ unlock_ram_in_cache:
        slwi    r4,r4,(10 - 1 - L1_CACHE_SHIFT)
        mtctr   r4
 1:     dcbi    r0,r3
+       dcblc   r0,r3
        addi    r3,r3,CONFIG_SYS_CACHELINE_SIZE
        bdnz    1b
        sync