board: ti: k2g: Program PadConfig_202 before locking RSTMUX8

The PADCONFIG_202 register (0x02621328) is affected by the locking
of the RSTMUX8 register (0x02620328), and so cannot be configured
in kernel. This has been confirmed as a hardware bug and affects
all K2G SoCs.

Setup the pinmux for this pin before locking the RSTMUX8 register
to allow the ICSS1 PRU1 Ethernet PHY port to work properly. The
workaround was added only for the K2G-ICE board to configure the
pins needed for the PRUSS Ethernet usecase.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210726232248.24395-1-s-anna@ti.com

diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index fa6c92cbdf1ed2d2040821e9554686147e969bd5..f24e62850b8bb57697292db8bbbf6920a09b7de3 100644 (file)
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -368,6 +368,9 @@ struct pin_cfg k2g_ice_evm_pin_cfg[] = {
        { 98,   BUFFER_CLASS_B | PIN_PDIS | MODE(0) },  /* MDIO_DATA */
        { 99,   BUFFER_CLASS_B | PIN_PDIS | MODE(0) },  /* MDIO_CLK */
 
+       /* ICSS1 Padconf Workaround */
+       { 202, MODE(1) | PIN_PDIS },    /* PR1_PRU1_GPO1.PR1_PRU1_GPI1 (PR1_MII1_RXD1) */
+
        { MAX_PIN_N, }
 };