]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mtd: spi-nor: Add parallel memories support for read_sr and read_fsr
authorAshok Reddy Soma <ashok.reddy.soma@amd.com>
Thu, 26 Sep 2024 04:55:03 +0000 (10:25 +0530)
committerTom Rini <trini@konsulko.com>
Wed, 9 Oct 2024 15:01:54 +0000 (09:01 -0600)
Add support for parallel memories flash configuration in read status
register and read flag status register functions.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
drivers/mtd/spi/spi-nor-core.c

index 8ba3a9bd60e238b7d5ffa759feb4b3587ebe64c9..ecebb441716b2483571e65e92d5e85f7037b4999 100644 (file)
@@ -467,8 +467,9 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
 }
 
 /*
- * Read the status register, returning its value in the location
- * Return the status register value.
+ * Return the status register value. If the chip is parallel, then the
+ * read will be striped, so we should read 2 bytes to get the sr
+ * register value from both of the parallel chips.
  * Returns negative if error occurred.
  */
 static int read_sr(struct spi_nor *nor)
@@ -500,18 +501,29 @@ static int read_sr(struct spi_nor *nor)
        if (spi_nor_protocol_is_dtr(nor->reg_proto))
                op.data.nbytes = 2;
 
-       ret = spi_nor_read_write_reg(nor, &op, val);
-       if (ret < 0) {
-               pr_debug("error %d reading SR\n", (int)ret);
-               return ret;
+       if (nor->flags & SNOR_F_HAS_PARALLEL) {
+               op.data.nbytes = 2;
+               ret = spi_nor_read_write_reg(nor, &op, &val[0]);
+               if (ret < 0) {
+                       pr_debug("error %d reading SR\n", (int)ret);
+                       return ret;
+               }
+               val[0] |= val[1];
+       } else {
+               ret = spi_nor_read_write_reg(nor, &op, &val[0]);
+               if (ret < 0) {
+                       pr_debug("error %d reading SR\n", (int)ret);
+                       return ret;
+               }
        }
 
-       return *val;
+       return val[0];
 }
 
 /*
- * Read the flag status register, returning its value in the location
- * Return the status register value.
+ * Return the flag status register value. If the chip is parallel, then
+ * the read will be striped, so we should read 2 bytes to get the fsr
+ * register value from both of the parallel chips.
  * Returns negative if error occurred.
  */
 static int read_fsr(struct spi_nor *nor)
@@ -543,13 +555,23 @@ static int read_fsr(struct spi_nor *nor)
        if (spi_nor_protocol_is_dtr(nor->reg_proto))
                op.data.nbytes = 2;
 
-       ret = spi_nor_read_write_reg(nor, &op, val);
-       if (ret < 0) {
-               pr_debug("error %d reading FSR\n", ret);
-               return ret;
+       if (nor->flags & SNOR_F_HAS_PARALLEL) {
+               op.data.nbytes = 2;
+               ret = spi_nor_read_write_reg(nor, &op, &val[0]);
+               if (ret < 0) {
+                       pr_debug("error %d reading SR\n", (int)ret);
+                       return ret;
+               }
+               val[0] &= val[1];
+       } else {
+               ret = spi_nor_read_write_reg(nor, &op, &val[0]);
+               if (ret < 0) {
+                       pr_debug("error %d reading FSR\n", ret);
+                       return ret;
+               }
        }
 
-       return *val;
+       return val[0];
 }
 
 /*