arm64: zynqmp: Add support reading SoC revision using nvmem driver in dwc3

This patch adds support for reading silicon revision using zynqmp nvmem
driver.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 10a53bb9f04998c777afd65bc728ca50540aeaeb..dce5da4e06e5be3000f9e87eb9865d383ffdaadd 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -1022,6 +1022,8 @@
                        iommus = <&smmu 0x860>;
                        power-domains = <&pd_usb0>;
                        ranges;
+                       nvmem-cells = <&soc_revision>;
+                       nvmem-cell-names = "soc_revision";
 
                        dwc3_0: dwc3@fe200000 {
                                compatible = "snps,dwc3";
@@ -1045,6 +1047,8 @@
                        iommus = <&smmu 0x861>;
                        power-domains = <&pd_usb1>;
                        ranges;
+                       nvmem-cells = <&soc_revision>;
+                       nvmem-cell-names = "soc_revision";
 
                        dwc3_1: dwc3@fe300000 {
                                compatible = "snps,dwc3";