clk: imx: Add support for pllv3 enet clock

This code has been ported from Linux kernel v5.5.5 (tag) and has been
adjusted to U-Boot's DM.

It adds support for correct recognition of IMX_PLLV3_ENET flag in the
clk-pllv3.c driver.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index b4a9d587e1b191650796d32c94a90c7d4dc94096..feacaee1c42b9a9d3577dd2e00da2f784f614eeb 100644 (file)
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -20,6 +20,7 @@
 #define UBOOT_DM_CLK_IMX_PLLV3_SYS     "imx_clk_pllv3_sys"
 #define UBOOT_DM_CLK_IMX_PLLV3_USB     "imx_clk_pllv3_usb"
 #define UBOOT_DM_CLK_IMX_PLLV3_AV      "imx_clk_pllv3_av"
+#define UBOOT_DM_CLK_IMX_PLLV3_ENET     "imx_clk_pllv3_enet"
 
 #define PLL_NUM_OFFSET         0x10
 #define PLL_DENOM_OFFSET       0x20
@@ -36,6 +37,7 @@ struct clk_pllv3 {
        u32             enable_bit;
        u32             div_mask;
        u32             div_shift;
+       unsigned long   ref_clock;
 };
 
 #define to_clk_pllv3(_clk) container_of(_clk, struct clk_pllv3, clk)
@@ -232,6 +234,19 @@ static const struct clk_ops clk_pllv3_av_ops = {
        .set_rate       = clk_pllv3_av_set_rate,
 };
 
+static ulong clk_pllv3_enet_get_rate(struct clk *clk)
+{
+       struct clk_pllv3 *pll = to_clk_pllv3(clk);
+
+       return pll->ref_clock;
+}
+
+static const struct clk_ops clk_pllv3_enet_ops = {
+       .enable = clk_pllv3_generic_enable,
+       .disable        = clk_pllv3_generic_disable,
+       .get_rate       = clk_pllv3_enet_get_rate,
+};
+
 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
                          const char *parent_name, void __iomem *base,
                          u32 div_mask)
@@ -269,6 +284,10 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
                pll->div_shift = 0;
                pll->powerup_set = false;
                break;
+       case IMX_PLLV3_ENET:
+               drv_name = UBOOT_DM_CLK_IMX_PLLV3_ENET;
+               pll->ref_clock = 500000000;
+               break;
        default:
                kfree(pll);
                return ERR_PTR(-ENOTSUPP);
@@ -314,3 +333,9 @@ U_BOOT_DRIVER(clk_pllv3_av) = {
        .ops    = &clk_pllv3_av_ops,
        .flags = DM_FLAG_PRE_RELOC,
 };
+
+U_BOOT_DRIVER(clk_pllv3_enet) = {
+       .name   = UBOOT_DM_CLK_IMX_PLLV3_ENET,
+       .id     = UCLASS_CLK,
+       .ops    = &clk_pllv3_enet_ops,
+};