]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
x86: apl: Reduce size for TPL
authorSimon Glass <sjg@chromium.org>
Wed, 23 Dec 2020 15:11:30 +0000 (08:11 -0700)
committerSimon Glass <sjg@chromium.org>
Tue, 5 Jan 2021 19:24:41 +0000 (12:24 -0700)
Update various drivers to use of_match_ptr() and to avoid including debug
strings in TPL. Omit the WiFi driver entirely, since it is not used in
TPL.

This reduces the TPL binary size by about 608 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
13 files changed:
arch/x86/cpu/apollolake/lpc.c
arch/x86/cpu/apollolake/pch.c
arch/x86/cpu/apollolake/pmc.c
arch/x86/cpu/apollolake/uart.c
arch/x86/cpu/intel_common/Makefile
arch/x86/cpu/intel_common/itss.c
arch/x86/cpu/intel_common/p2sb.c
arch/x86/cpu/turbo.c
board/google/chromebook_coral/coral.c
drivers/gpio/intel_gpio.c
drivers/pinctrl/intel/pinctrl_apl.c
drivers/power/acpi_pmc/acpi-pmc-uclass.c
drivers/timer/tsc_timer.c

index d8e05f6a8f46d15274f64b56abfe83830633134a..e085890d638d766e664bc1497a8c4e3018bded7c 100644 (file)
@@ -81,10 +81,11 @@ int lpc_open_pmio_window(uint base, uint size)
 
                lgir_reg_num = find_unused_pmio_window();
                if (lgir_reg_num < 0) {
-                       log_err("LPC: Cannot open IO window: %lx size %lx\n",
-                               bridge_base, size - bridged_size);
-                       log_err("No more IO windows\n");
-
+                       if (spl_phase() > PHASE_TPL) {
+                               log_err("LPC: Cannot open IO window: %lx size %lx\n",
+                                       bridge_base, size - bridged_size);
+                               log_err("No more IO windows\n");
+                       }
                        return -ENOSPC;
                }
                lgir_reg_offset = LPC_GENERIC_IO_RANGE(lgir_reg_num);
@@ -127,15 +128,17 @@ struct acpi_ops apl_lpc_acpi_ops = {
        .inject_dsdt    = southbridge_inject_dsdt,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id apl_lpc_ids[] = {
        { .compatible = "intel,apl-lpc" },
        { }
 };
+#endif
 
 /* All pads are LPC already configured by the hostbridge, so no probing here */
 U_BOOT_DRIVER(intel_apl_lpc) = {
        .name           = "intel_apl_lpc",
        .id             = UCLASS_LPC,
-       .of_match       = apl_lpc_ids,
+       .of_match       = of_match_ptr(apl_lpc_ids),
        ACPI_OPS_PTR(&apl_lpc_acpi_ops)
 };
index d9832ff24966a6f05830301a216a75da559f615c..39d6ad5ed49aa39aaeb9417dc13cb7991fc292ce 100644 (file)
@@ -23,14 +23,16 @@ static const struct pch_ops apl_pch_ops = {
        .set_spi_protect = apl_set_spi_protect,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id apl_pch_ids[] = {
        { .compatible = "intel,apl-pch" },
        { }
 };
+#endif
 
 U_BOOT_DRIVER(intel_apl_pch) = {
        .name           = "intel_apl_pch",
        .id             = UCLASS_PCH,
-       .of_match       = apl_pch_ids,
+       .of_match       = of_match_ptr(apl_pch_ids),
        .ops            = &apl_pch_ops,
 };
index c40065ab8cff83ab29bd0e76d3c0f6f5bb7ed0ec..e033baf1205ed08eef5b9ac3c42a7888ab3f68c2 100644 (file)
@@ -212,15 +212,17 @@ static const struct acpi_pmc_ops apl_pmc_ops = {
        .global_reset_set_enable = apl_global_reset_set_enable,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id apl_pmc_ids[] = {
        { .compatible = "intel,apl-pmc" },
        { }
 };
+#endif
 
 U_BOOT_DRIVER(intel_apl_pmc) = {
        .name           = "intel_apl_pmc",
        .id             = UCLASS_ACPI_PMC,
-       .of_match       = apl_pmc_ids,
+       .of_match       = of_match_ptr(apl_pmc_ids),
        .of_to_plat = apl_pmc_ofdata_to_uc_plat,
        .probe          = apl_pmc_probe,
        .ops            = &apl_pmc_ops,
index e523d85b1b4455f9d67f64050e628120a35c5ac2..69e5899235b5a9d7110318dfbf7a658b08808acc 100644 (file)
@@ -118,15 +118,17 @@ static int apl_ns16550_of_to_plat(struct udevice *dev)
        return 0;
 }
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id apl_ns16550_serial_ids[] = {
        { .compatible = "intel,apl-ns16550" },
        { },
 };
+#endif
 
 U_BOOT_DRIVER(intel_apl_ns16550) = {
        .name   = "intel_apl_ns16550",
        .id     = UCLASS_SERIAL,
-       .of_match = apl_ns16550_serial_ids,
+       .of_match = of_match_ptr(apl_ns16550_serial_ids),
        .plat_auto      = sizeof(struct ns16550_plat),
        .priv_auto      = sizeof(struct ns16550),
        .ops    = &ns16550_serial_ops,
index 4a5cf17e41df5ff3d253ec7c97b6c9eb17b6e488..8b9a810f66db9fcb4e7957783628ab7ab2c2b099 100644 (file)
@@ -26,7 +26,7 @@ obj-y += cpu.o
 obj-y += fast_spi.o
 obj-y += lpc.o
 obj-y += lpss.o
-obj-$(CONFIG_INTEL_GENERIC_WIFI) += generic_wifi.o
+obj-$(CONFIG_$(SPL_)INTEL_GENERIC_WIFI) += generic_wifi.o
 ifndef CONFIG_TARGET_EFI_APP
 obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += microcode.o
 ifndef CONFIG_$(SPL_)X86_64
index e71ea029e51fac4ee6d665a8c3304c51fe85c383..6515d1f471fb5a31465770da1e9f5b9da000b6cd 100644 (file)
@@ -230,15 +230,17 @@ static const struct irq_ops itss_ops = {
 #endif
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id itss_ids[] = {
        { .compatible = "intel,itss", .data = X86_IRQT_ITSS },
        { }
 };
+#endif
 
 U_BOOT_DRIVER(intel_itss) = {
        .name           = "intel_itss",
        .id             = UCLASS_IRQ,
-       .of_match       = itss_ids,
+       .of_match       = of_match_ptr(itss_ids),
        .ops            = &itss_ops,
        .bind           = itss_bind,
        .of_to_plat = itss_of_to_plat,
index 3765eeeab0d9c3454e98274bc6cbc1eccd44e84e..cb901f265e2df2fb7483d408d29e064610ab90e7 100644 (file)
@@ -184,15 +184,17 @@ static const struct p2sb_ops p2sb_ops = {
        .set_hide       = intel_p2sb_set_hide,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id p2sb_ids[] = {
        { .compatible = "intel,p2sb" },
        { }
 };
+#endif
 
 U_BOOT_DRIVER(intel_p2sb) = {
        .name           = "intel_p2sb",
        .id             = UCLASS_P2SB,
-       .of_match       = p2sb_ids,
+       .of_match       = of_match_ptr(p2sb_ids),
        .probe          = p2sb_probe,
        .remove         = p2sb_remove,
        .ops            = &p2sb_ops,
index f8d85d5a339b2db5f1b032335736e060b9ed39bb..4a73cb240dac77d46669481d26d5fab5cb8b4aa0 100644 (file)
@@ -35,12 +35,15 @@ static inline void set_global_turbo_state(int state)
 }
 #endif
 
+/* gcc 7.3 does not wwant to drop strings, so use #ifdef */
+#ifndef CONFIG_TPL_BUILD
 static const char *const turbo_state_desc[] = {
        [TURBO_UNKNOWN]         = "unknown",
        [TURBO_UNAVAILABLE]     = "unavailable",
        [TURBO_DISABLED]        = "available but hidden",
        [TURBO_ENABLED]         = "available and visible"
 };
+#endif
 
 /*
  * Determine the current state of Turbo and cache it for later.
@@ -76,7 +79,9 @@ int turbo_get_state(void)
        }
 
        set_global_turbo_state(turbo_state);
+#ifndef CONFIG_TPL_BUILD
        debug("Turbo is %s\n", turbo_state_desc[turbo_state]);
+#endif
        return turbo_state;
 }
 
index b8b923c139eea5944c52777115fb1797cc1c27ec..34b2c2ac5d5828e7f07b45cf588545ccf15fb6f4 100644 (file)
@@ -143,14 +143,16 @@ struct acpi_ops coral_acpi_ops = {
        .inject_dsdt    = chromeos_acpi_gpio_generate,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id coral_ids[] = {
        { .compatible = "google,coral" },
        { }
 };
+#endif
 
 U_BOOT_DRIVER(coral_drv) = {
        .name           = "coral",
        .id             = UCLASS_SYSINFO,
-       .of_match       = coral_ids,
+       .of_match       = of_match_ptr(coral_ids),
        ACPI_OPS_PTR(&coral_acpi_ops)
 };
index 41540d8ebc63e07206eb73e2b87c6236ae99a296..eda95485c932f7d23a2fba5e46b8853bddc91556 100644 (file)
@@ -188,15 +188,17 @@ static const struct dm_gpio_ops gpio_intel_ops = {
 #endif
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id intel_intel_gpio_ids[] = {
        { .compatible = "intel,gpio" },
        { }
 };
+#endif
 
 U_BOOT_DRIVER(intel_gpio) = {
        .name   = "intel_gpio",
        .id     = UCLASS_GPIO,
-       .of_match = intel_intel_gpio_ids,
+       .of_match = of_match_ptr(intel_intel_gpio_ids),
        .ops    = &gpio_intel_ops,
        .of_to_plat     = intel_gpio_of_to_plat,
        .probe  = intel_gpio_probe,
index 2bb654c8a1846b6a0bd79198e80fd43e290a77fc..b512a85f3e6a186c56171842821add4d30951000 100644 (file)
@@ -167,15 +167,17 @@ static int apl_pinctrl_of_to_plat(struct udevice *dev)
        return intel_pinctrl_of_to_plat(dev, comm, 2);
 }
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id apl_gpio_ids[] = {
        { .compatible = "intel,apl-pinctrl"},
        { }
 };
+#endif
 
 U_BOOT_DRIVER(intel_apl_pinctrl) = {
        .name           = "intel_apl_pinctrl",
        .id             = UCLASS_PINCTRL,
-       .of_match       = apl_gpio_ids,
+       .of_match       = of_match_ptr(apl_gpio_ids),
        .probe          = intel_pinctrl_probe,
        .ops            = &intel_pinctrl_ops,
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
index 32a2836f0bf15a58ea4286c01dabceb0dbc01378..34446a34e60d21778deae3938d8294f6aba8b20c 100644 (file)
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <log.h>
+#include <spl.h>
 #include <acpi/acpi_s3.h>
 #ifdef CONFIG_X86
 #include <asm/intel_pinctrl.h>
@@ -60,7 +61,8 @@ int pmc_gpe_init(struct udevice *dev)
         * are different and if they aren't, use the reset values.
         */
        if (dw[0] == dw[1] || dw[1] == dw[2]) {
-               log_info("PMC: Using default GPE route");
+               if (spl_phase() > PHASE_TPL)
+                       log_info("PMC: Using default GPE route");
                gpio_cfg = readl(upriv->gpe_cfg);
                for (i = 0; i < upriv->gpe0_count; i++)
                        dw[i] = gpio_cfg >> gpe0_shift(upriv, i);
index e3677704b33ddd62e9f5b3c0c5dd3afdc9fc21f9..706d52b830a5f161d6a5825c4f8fbd7e7f6a4173 100644 (file)
@@ -477,15 +477,17 @@ static const struct timer_ops tsc_timer_ops = {
        .get_count = tsc_timer_get_count,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id tsc_timer_ids[] = {
        { .compatible = "x86,tsc-timer", },
        { }
 };
+#endif
 
 U_BOOT_DRIVER(x86_tsc_timer) = {
        .name   = "x86_tsc_timer",
        .id     = UCLASS_TIMER,
-       .of_match = tsc_timer_ids,
+       .of_match = of_match_ptr(tsc_timer_ids),
        .probe = tsc_timer_probe,
        .ops    = &tsc_timer_ops,
 };