x86: Convert to use driver model timer

Convert all x86 boards to use driver model tsc timer.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index a009c14bd9b75a268fc61b562079b6a0759a34d5..9b30451b28e7ab95e8a8e3fc3ec6bafe0394416f 100644 (file)
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -28,9 +28,6 @@ int arch_cpu_init(void)
        int ret;
 
        post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
-       timer_set_base(rdtsc());
-#endif
 
        ret = x86_cpu_init_f();
        if (ret)

diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c
index 0edee6bd2c2a16d3bca06e46ff4acb9fedcb882e..b3827951e6e41852875bbd68dc9e500cf0d557b6 100644 (file)
--- a/arch/x86/cpu/coreboot/timestamp.c
+++ b/arch/x86/cpu/coreboot/timestamp.c
@@ -27,28 +27,6 @@ static struct timestamp_table *ts_table  __attribute__((section(".data")));
 
 void timestamp_init(void)
 {
-#ifdef CONFIG_SYS_X86_TSC_TIMER
-       uint64_t base_time;
-#endif
-
-       ts_table = lib_sysinfo.tstamp_table;
-#ifdef CONFIG_SYS_X86_TSC_TIMER
-       /*
-        * If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value
-        * of base_time in coreboot's timestamp table as our timer base,
-        * otherwise TSC counter value will be used.
-        *
-        * Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS,
-        * the value of base_time in the timestamp table is still zero, so
-        * we must exclude this case too (this is currently seen on booting
-        * coreboot in qemu)
-        */
-       if (ts_table && ts_table->base_time)
-               base_time = ts_table->base_time;
-       else
-               base_time = rdtsc();
-       timer_set_base(base_time);
-#endif
        timestamp_add_now(TS_U_BOOT_INITTED);
 }
 

diff --git a/arch/x86/cpu/efi/efi.c b/arch/x86/cpu/efi/efi.c
index 75ba0d4844ad87f5c3546a886d678c38ddaa283a..993ab8dcde26268fbcb35faaf6f8a9def6443a8d 100644 (file)
--- a/arch/x86/cpu/efi/efi.c
+++ b/arch/x86/cpu/efi/efi.c
@@ -10,10 +10,6 @@
 
 int arch_cpu_init(void)
 {
-#ifdef CONFIG_SYS_X86_TSC_TIMER
-       timer_set_base(rdtsc());
-#endif
-
        return 0;
 }
 

diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index 0e6512c675c910ea866422e924b67cd301ce554c..03874448a613e100f5175a1153a95d6fbfa1826e 100644 (file)
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -118,7 +118,6 @@ static void set_spi_speed(void)
 int arch_cpu_init(void)
 {
        post_code(POST_CPU_INIT);
-       timer_set_base(rdtsc());
 
        return x86_cpu_init_f();
 }

diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 84fb082077d13ea980ebea7d7c8f9b1dc45261d3..1f93f72dc8dc60c5a6bd42c6e01ad3aaac2d2630 100644 (file)
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -64,9 +64,6 @@ int arch_cpu_init(void)
        int ret;
 
        post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
-       timer_set_base(rdtsc());
-#endif
 
        ret = x86_cpu_init_f();
        if (ret)

diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index f737e1921f778ff7d188e22f235034c5a408df4b..c2bf497d684d8e851d27e69d299bd291ada27b67 100644 (file)
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -233,9 +233,6 @@ int arch_cpu_init(void)
        int ret;
 
        post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
-       timer_set_base(rdtsc());
-#endif
 
        ret = x86_cpu_init_f();
        if (ret)

diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 933d189f05e23819c24502f02448f126be832316..fb81919c212fa2d678d2b17a4d3a6f94ce7264b8 100644 (file)
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -52,9 +52,6 @@ int arch_cpu_init(void)
        int ret;
 
        post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
-       timer_set_base(rdtsc());
-#endif
 
        ret = x86_cpu_init_f();
        if (ret)

diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index aa863878fec9a7d8894a65e194cc91b70c68af14..d3380dee6ccc4cd9244bd216a1c9b70baf4cb42a 100644 (file)
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -13,6 +13,7 @@
 /include/ "keyboard.dtsi"
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
 
 / {
        model = "Intel Bayley Bay";

diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts
index a6b5d0f4a59d52b1fbf9dd07d1513275d02e9cd8..194f0ebcda4b9995d43bb697641eb3c31c7a6413 100644 (file)
--- a/arch/x86/dts/broadwell_som-6896.dts
+++ b/arch/x86/dts/broadwell_som-6896.dts
@@ -3,6 +3,7 @@
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
 
 / {
        model = "Advantech SOM-6896";

diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index 7870bb172bf35521ad26a9e5c60b5c50dd890b2a..c4469a97683d705fd303893144e4b7fa02ffc3f1 100644 (file)
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -4,6 +4,7 @@
 /include/ "keyboard.dtsi"
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
 
 / {
        model = "Google Link";

diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index 61e8f2f66b9c2e319ae4f8151191cb228efd1cfd..4e2b51708b1915cc0f1a2bfe90ce8c5869bc2301 100644 (file)
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -3,6 +3,7 @@
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
 
 / {
        model = "Google Panther";

diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index eb8421cc79e7ee4c51270f422596750c2411febd..e17ce7153a9132484324b9c2db3a997b2c6512bf 100644 (file)
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -12,6 +12,7 @@
 /include/ "serial.dtsi"
 /include/ "keyboard.dtsi"
 /include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
 
 / {
        model = "Intel Crown Bay";

diff --git a/arch/x86/dts/efi.dts b/arch/x86/dts/efi.dts
index 1f50428aa2eec3c00df0bfe71ac02fd706c232bb..6cd8116afdc98365035764c9f88602b100a4c314 100644 (file)
--- a/arch/x86/dts/efi.dts
+++ b/arch/x86/dts/efi.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 /include/ "skeleton.dtsi"
+/include/ "tsc_timer.dtsi"
 
 / {
        model = "EFI";
@@ -16,6 +17,10 @@
                stdout-path = &serial;
        };
 
+       tsc-timer {
+               clock-frequency = <1000000000>;
+       };
+
        serial: serial {
                compatible = "efi,uart";
        };

diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index b49b1f55ac948b671b6365defc06024db447291c..2342de7c1061170fc8a27f7ad24c9b2a4dae0af7 100644 (file)
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -11,6 +11,7 @@
 
 /include/ "skeleton.dtsi"
 /include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
 
 / {
        model = "Intel Galileo";
@@ -28,6 +29,10 @@
                stdout-path = &pciuart0;
        };
 
+       tsc-timer {
+               clock-frequency = <400000000>;
+       };
+
        mrc {
                compatible = "intel,quark-mrc";
                flags = <MRC_FLAG_SCRAMBLE_EN>;

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index b03f9878dda605ad2e294faa1b6dd279a031132f..bbfd6d4028086afe5077591cf93026c6b5975815 100644 (file)
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -12,6 +12,7 @@
 /include/ "skeleton.dtsi"
 /include/ "serial.dtsi"
 /include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
 
 / {
        model = "Intel Minnowboard Max";

diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
index 8da7e5239599b590ca703439ed8e907d504fd8fb..8a062294798ed17b0a9da2413c9f9d596555ed16 100644 (file)
--- a/arch/x86/dts/qemu-x86_i440fx.dts
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -12,6 +12,7 @@
 /include/ "serial.dtsi"
 /include/ "keyboard.dtsi"
 /include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
 
 / {
        model = "QEMU x86 (I440FX)";
@@ -44,6 +45,10 @@
                };
        };
 
+       tsc-timer {
+               clock-frequency = <1000000000>;
+       };
+
        pci {
                compatible = "pci-x86";
                #address-cells = <3>;

diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index df30c89fabf8e9e389a416b49eb1d8d733337c1d..0b685c8b799f0de0913eeee5b72a4a74b1d91c94 100644 (file)
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -22,6 +22,7 @@
 /include/ "serial.dtsi"
 /include/ "keyboard.dtsi"
 /include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
 
 / {
        model = "QEMU x86 (Q35)";
@@ -55,6 +56,10 @@
                };
        };
 
+       tsc-timer {
+               clock-frequency = <1000000000>;
+       };
+
        pci {
                compatible = "pci-x86";
                #address-cells = <3>;

diff --git a/arch/x86/dts/tsc_timer.dtsi b/arch/x86/dts/tsc_timer.dtsi
new file mode 100644 (file)
index 0000000..4f5021d
--- /dev/null
+++ b/arch/x86/dts/tsc_timer.dtsi
@@ -0,0 +1,6 @@
+/ {
+       tsc-timer {
+               compatible = "x86,tsc-timer";
+               u-boot,dm-pre-reloc;
+       };
+};

diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig
index 0a5a56f56f6f07dc5b5047f8afa9476d27b8c900..f462e059de2e6b3c84928e70e4d0d57a8584c097 100644 (file)
--- a/configs/bayleybay_defconfig
+++ b/configs/bayleybay_defconfig
@@ -30,6 +30,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_ICH_SPI=y
+CONFIG_TIMER=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_VIDEO_VESA=y

diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index ac64877daff33ff03087d74946d93e0d33f86f24..dbfbb97d9484c85d83875f9bfc84721727c62391 100644 (file)
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -32,6 +32,7 @@ CONFIG_DEBUG_UART_CLOCK=1843200
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_NS16550=y
 CONFIG_ICH_SPI=y
+CONFIG_TIMER=y
 CONFIG_TPM_TIS_LPC=y
 CONFIG_VIDEO_VESA=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y

diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig
index 0f3a9afe22acbd2361c3db5356d0b2bac86fa6a9..ed4428fe6d09a6b92a69a556c78d06c24b0f2230 100644 (file)
--- a/configs/chromebox_panther_defconfig
+++ b/configs/chromebox_panther_defconfig
@@ -27,6 +27,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_ICH_SPI=y
+CONFIG_TIMER=y
 CONFIG_TPM_TIS_LPC=y
 CONFIG_VIDEO_VESA=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y

diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig
index 8903cddd7bc82a56f830c9242ad341be4febf3ec..05b1325c0665b6dd6c429b0794964bc618a94855 100644 (file)
--- a/configs/coreboot-x86_defconfig
+++ b/configs/coreboot-x86_defconfig
@@ -21,6 +21,7 @@ CONFIG_E1000=y
 CONFIG_DM_PCI=y
 CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
+CONFIG_TIMER=y
 CONFIG_TPM_TIS_LPC=y
 CONFIG_USB=y
 CONFIG_DM_USB=y

diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index f4592c5449a9a2cff6635712ececf47d1bed0edf..932d9ecc4474bb04ac12dda566fa4eb8c847a0bb 100644 (file)
--- a/configs/crownbay_defconfig
+++ b/configs/crownbay_defconfig
@@ -30,6 +30,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_ICH_SPI=y
+CONFIG_TIMER=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_VIDEO_VESA=y

diff --git a/configs/efi-x86_defconfig b/configs/efi-x86_defconfig
index 2daab36b3b4853795e7ee4c4831f0076b8fe1032..3b810468a13409c21e7229b4695b154c52ced3d3 100644 (file)
--- a/configs/efi-x86_defconfig
+++ b/configs/efi-x86_defconfig
@@ -14,4 +14,6 @@ CONFIG_DEBUG_EFI_CONSOLE=y
 CONFIG_DEBUG_UART_BASE=0
 CONFIG_DEBUG_UART_CLOCK=0
 CONFIG_ICH_SPI=y
+# CONFIG_X86_SERIAL is not set
+CONFIG_TIMER=y
 CONFIG_EFI=y

diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 3612350e53f5457b3b34a542e6987bc21ce16877..0604aa76a5277dbf02c8036b0c1aa1045ebb0136 100644 (file)
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -24,6 +24,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_ICH_SPI=y
+CONFIG_TIMER=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index 37c07c172380a082109dc73f5065b0d26feb9c75..864fd1b72f9a87c171992043b5aa0a2202abe75c 100644 (file)
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -32,6 +32,7 @@ CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
 CONFIG_SYS_NS16550=y
 CONFIG_ICH_SPI=y
+CONFIG_TIMER=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_VIDEO_VESA=y

diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index ebdb892aba65d9aa58f9806b1391fd75890c396f..8c86931cf49bbc5dc5f735ef9489bb917a0522be 100644 (file)
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -23,6 +23,7 @@ CONFIG_E1000=y
 CONFIG_DM_PCI=y
 CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
+CONFIG_TIMER=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_VIDEO_VESA=y