powerpc/t104xrdb: Add basic ethernet support

This covers only non-L2 switch ethernet interfaces i.e.
RGMII and SGMII interface for both T1040RDB and T1042RDB_PI

T1040RDB is configured as serdes protocol 0x66 which can
support following interfaces
    2 RGMIIS on DTSEC4, DTSEC5
    1 SGMII on DTSEC3

T1042RDB_PI is configured as serdes protocol 0x06 which can
support following interfaces
    2 RGMIIS on DTSEC4, DTSEC5

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
[York Sun: Minor change in commit message]
Signed-off-by: York Sun <yorksun@freescale.com>

diff --git a/board/freescale/t104xrdb/Makefile b/board/freescale/t104xrdb/Makefile
index 76c0c94b0e18722d2f0af1c254962e693530d3c5..e51fb7a7f45cf123bb233192e4b17fbd9c0d0408 100644 (file)
--- a/board/freescale/t104xrdb/Makefile
+++ b/board/freescale/t104xrdb/Makefile
@@ -7,6 +7,7 @@
 
 obj-y  += t104xrdb.o
 obj-y  += ddr.o
+obj-y  += eth.o
 obj-$(CONFIG_PCI)      += pci.o
 obj-y  += law.o
 obj-y  += tlb.o

diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c
new file mode 100644 (file)
index 0000000..0188fd4
--- /dev/null
+++ b/board/freescale/t104xrdb/eth.c
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <asm/immap_85xx.h>
+#include <fm_eth.h>
+#include <fsl_mdio.h>
+#include <malloc.h>
+#include <asm/fsl_dtsec.h>
+
+#include "../common/fman.h"
+
+int board_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_FMAN_ENET
+       struct memac_mdio_info memac_mdio_info;
+       unsigned int i;
+       int phy_addr = 0;
+       printf("Initializing Fman\n");
+
+       memac_mdio_info.regs =
+               (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR;
+       memac_mdio_info.name = DEFAULT_FM_MDIO_NAME;
+
+       /* Register the real 1G MDIO bus */
+       fm_memac_mdio_init(bis, &memac_mdio_info);
+
+       /*
+        * Program on board RGMII, SGMII PHY addresses.
+        */
+       for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
+               int idx = i - FM1_DTSEC1;
+
+               switch (fm_info_get_enet_if(i)) {
+#ifdef CONFIG_T1040RDB
+               case PHY_INTERFACE_MODE_SGMII:
+                       /* T1040RDB only supports SGMII on DTSEC3 */
+                       fm_info_set_phy_address(FM1_DTSEC3,
+                                               CONFIG_SYS_SGMII1_PHY_ADDR);
+#endif
+               case PHY_INTERFACE_MODE_RGMII:
+                       if (FM1_DTSEC4 == i)
+                               phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR;
+                       if (FM1_DTSEC5 == i)
+                               phy_addr = CONFIG_SYS_RGMII2_PHY_ADDR;
+                       fm_info_set_phy_address(i, phy_addr);
+                       break;
+               case PHY_INTERFACE_MODE_QSGMII:
+                       fm_info_set_phy_address(i, 0);
+                       break;
+               case PHY_INTERFACE_MODE_NONE:
+                       fm_info_set_phy_address(i, 0);
+                       break;
+               default:
+                       printf("Fman1: DTSEC%u set to unknown interface %i\n",
+                              idx + 1, fm_info_get_enet_if(i));
+                       fm_info_set_phy_address(i, 0);
+                       break;
+               }
+               fm_info_set_mdio(i,
+                                miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
+       }
+
+       cpu_eth_init(bis);
+#endif
+
+       return pci_eth_init(bis);
+}

diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h
index 611b95c44785792da2cd45dbaaec1cdb7def1555..7cfda50c8cdbe2692e330aa5dc7ea4abbbd4b6da 100644 (file)
--- a/include/configs/T1040RDB.h
+++ b/include/configs/T1040RDB.h
@@ -544,13 +544,12 @@
 #endif
 
 #ifdef CONFIG_FMAN_ENET
-#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR    0x1c
-#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR    0x1d
-#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR    0x1e
-#define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR    0x1f
+#define CONFIG_SYS_SGMII1_PHY_ADDR             0x03
+#define CONFIG_SYS_RGMII1_PHY_ADDR             0x01
+#define CONFIG_SYS_RGMII2_PHY_ADDR             0x02
 
 #define CONFIG_MII             /* MII PHY management */
-#define CONFIG_ETHPRIME                "FM1@DTSEC1"
+#define CONFIG_ETHPRIME                "FM1@DTSEC4"
 #define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif
 

diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h
index 1cbc375b0474542156aa3f52a1c160bed6896814..ed9ca8a3e19dae43dd3f46c9908ca9a97de6e914 100644 (file)
--- a/include/configs/T1042RDB_PI.h
+++ b/include/configs/T1042RDB_PI.h
@@ -552,8 +552,11 @@
 #endif
 
 #ifdef CONFIG_FMAN_ENET
+#define CONFIG_SYS_RGMII1_PHY_ADDR             0x01
+#define CONFIG_SYS_RGMII2_PHY_ADDR             0x02
+
 #define CONFIG_MII             /* MII PHY management */
-#define CONFIG_ETHPRIME                "FM1@DTSEC1"
+#define CONFIG_ETHPRIME                "FM1@DTSEC4"
 #define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #endif