ARM: tegra: clock: add clk_id_to_pll_id helper

This function allows to convert a device tree clock ID to PLL ID.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Tom <twarren@nvidia.com>

diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h
index 1dd5d0742c495d591d4a4a1425e3347275025dcd..2270501406466aef90304e9d604991d5c828a835 100644 (file)
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -354,6 +354,14 @@ int get_periph_clock_source(enum periph_id periph_id,
  */
 enum periph_id clk_id_to_periph_id(int clk_id);
 
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id       Clock ID according to tegra device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid
+ */
+enum clock_id clk_id_to_pll_id(int clk_id);
+
 /**
  * Set the output frequency you want for each PLL clock.
  * PLL output frequencies are programmed by setting their N, M and P values.

diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c
index 143f86863ff45d0a850cd06f97c4c21b15a00705..15c2adc4170a3b528498942cc150b8723d4b0585 100644 (file)
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -19,6 +19,8 @@
 #include <fdtdec.h>
 #include <linux/delay.h>
 
+#include <dt-bindings/clock/tegra114-car.h>
+
 /*
  * Clock types that we can use as a source. The Tegra114 has muxes for the
  * peripheral clocks, and in most cases there are four options for the clock
@@ -646,6 +648,41 @@ enum periph_id clk_id_to_periph_id(int clk_id)
                return clk_id;
        }
 }
+
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id       Clock ID according to tegra114 device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid
+ */
+enum clock_id clk_id_to_pll_id(int clk_id)
+{
+       switch (clk_id) {
+       case TEGRA114_CLK_PLL_C:
+               return CLOCK_ID_CGENERAL;
+       case TEGRA114_CLK_PLL_M:
+               return CLOCK_ID_MEMORY;
+       case TEGRA114_CLK_PLL_P:
+               return CLOCK_ID_PERIPH;
+       case TEGRA114_CLK_PLL_A:
+               return CLOCK_ID_AUDIO;
+       case TEGRA114_CLK_PLL_U:
+               return CLOCK_ID_USB;
+       case TEGRA114_CLK_PLL_D:
+       case TEGRA114_CLK_PLL_D_OUT0:
+               return CLOCK_ID_DISPLAY;
+       case TEGRA114_CLK_PLL_X:
+               return CLOCK_ID_XCPU;
+       case TEGRA114_CLK_PLL_E_OUT0:
+               return CLOCK_ID_EPCI;
+       case TEGRA114_CLK_CLK_32K:
+               return CLOCK_ID_32KHZ;
+       case TEGRA114_CLK_CLK_M:
+               return CLOCK_ID_CLK_M;
+       default:
+               return CLOCK_ID_NONE;
+       }
+}
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 
 void clock_early_init(void)

diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c
index da38b26c27d5776e35f89b9b16e6241ef4cc8b7a..415ba15e5ddd7b21bb941a6ec1f4fd2c5244831f 100644 (file)
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -19,6 +19,9 @@
 #include <fdtdec.h>
 #include <linux/delay.h>
 
+#include <dt-bindings/clock/tegra124-car.h>
+#include <dt-bindings/clock/tegra124-car-common.h>
+
 /*
  * Clock types that we can use as a source. The Tegra124 has muxes for the
  * peripheral clocks, and in most cases there are four options for the clock
@@ -826,6 +829,41 @@ enum periph_id clk_id_to_periph_id(int clk_id)
                return clk_id;
        }
 }
+
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id       Clock ID according to tegra124 device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid
+ */
+enum clock_id clk_id_to_pll_id(int clk_id)
+{
+       switch (clk_id) {
+       case TEGRA124_CLK_PLL_C:
+               return CLOCK_ID_CGENERAL;
+       case TEGRA124_CLK_PLL_M:
+               return CLOCK_ID_MEMORY;
+       case TEGRA124_CLK_PLL_P:
+               return CLOCK_ID_PERIPH;
+       case TEGRA124_CLK_PLL_A:
+               return CLOCK_ID_AUDIO;
+       case TEGRA124_CLK_PLL_U:
+               return CLOCK_ID_USB;
+       case TEGRA124_CLK_PLL_D:
+       case TEGRA124_CLK_PLL_D_OUT0:
+               return CLOCK_ID_DISPLAY;
+       case TEGRA124_CLK_PLL_X:
+               return CLOCK_ID_XCPU;
+       case TEGRA124_CLK_PLL_E:
+               return CLOCK_ID_EPCI;
+       case TEGRA124_CLK_CLK_32K:
+               return CLOCK_ID_32KHZ;
+       case TEGRA124_CLK_CLK_M:
+               return CLOCK_ID_CLK_M;
+       default:
+               return CLOCK_ID_NONE;
+       }
+}
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 
 void clock_early_init(void)

diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c
index 0316073d1a2b3f3e1557901d7c6c87ba3dcb2118..593622bfdcbdb63d8944be4060ae036f0ea7757d 100644 (file)
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -20,6 +20,8 @@
 #include <fdtdec.h>
 #include <linux/delay.h>
 
+#include <dt-bindings/clock/tegra20-car.h>
+
 /*
  * Clock types that we can use as a source. The Tegra20 has muxes for the
  * peripheral clocks, and in most cases there are four options for the clock
@@ -578,6 +580,41 @@ enum periph_id clk_id_to_periph_id(int clk_id)
                return clk_id;
        }
 }
+
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id       Clock ID according to tegra20 device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid
+ */
+enum clock_id clk_id_to_pll_id(int clk_id)
+{
+       switch (clk_id) {
+       case TEGRA20_CLK_PLL_C:
+               return CLOCK_ID_CGENERAL;
+       case TEGRA20_CLK_PLL_M:
+               return CLOCK_ID_MEMORY;
+       case TEGRA20_CLK_PLL_P:
+               return CLOCK_ID_PERIPH;
+       case TEGRA20_CLK_PLL_A:
+               return CLOCK_ID_AUDIO;
+       case TEGRA20_CLK_PLL_U:
+               return CLOCK_ID_USB;
+       case TEGRA20_CLK_PLL_D:
+       case TEGRA20_CLK_PLL_D_OUT0:
+               return CLOCK_ID_DISPLAY;
+       case TEGRA20_CLK_PLL_X:
+               return CLOCK_ID_XCPU;
+       case TEGRA20_CLK_PLL_E:
+               return CLOCK_ID_EPCI;
+       case TEGRA20_CLK_CLK_32K:
+               return CLOCK_ID_32KHZ;
+       case TEGRA20_CLK_CLK_M:
+               return CLOCK_ID_CLK_M;
+       default:
+               return CLOCK_ID_NONE;
+       }
+}
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 
 void clock_early_init(void)

diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index 330753f2ad1a30b70f177adb5ad97ef50241738d..76fbfef580c71708290c43a0337e7c10ce896c19 100644 (file)
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -22,6 +22,8 @@
 #include <linux/bitops.h>
 #include <linux/delay.h>
 
+#include <dt-bindings/clock/tegra210-car.h>
+
 /*
  * Clock types that we can use as a source. The Tegra210 has muxes for the
  * peripheral clocks, and in most cases there are four options for the clock
@@ -914,6 +916,41 @@ enum periph_id clk_id_to_periph_id(int clk_id)
                return clk_id;
        }
 }
+
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id       Clock ID according to tegra210 device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid
+ */
+enum clock_id clk_id_to_pll_id(int clk_id)
+{
+       switch (clk_id) {
+       case TEGRA210_CLK_PLL_C:
+               return CLOCK_ID_CGENERAL;
+       case TEGRA210_CLK_PLL_M:
+               return CLOCK_ID_MEMORY;
+       case TEGRA210_CLK_PLL_P:
+               return CLOCK_ID_PERIPH;
+       case TEGRA210_CLK_PLL_A:
+               return CLOCK_ID_AUDIO;
+       case TEGRA210_CLK_PLL_U:
+               return CLOCK_ID_USB;
+       case TEGRA210_CLK_PLL_D:
+       case TEGRA210_CLK_PLL_D_OUT0:
+               return CLOCK_ID_DISPLAY;
+       case TEGRA210_CLK_PLL_X:
+               return CLOCK_ID_XCPU;
+       case TEGRA210_CLK_PLL_E:
+               return CLOCK_ID_EPCI;
+       case TEGRA210_CLK_CLK_32K:
+               return CLOCK_ID_32KHZ;
+       case TEGRA210_CLK_CLK_M:
+               return CLOCK_ID_CLK_M;
+       default:
+               return CLOCK_ID_NONE;
+       }
+}
 #endif /* CONFIG_OF_CONTROL */
 
 /*

diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c
index e5c2fd542ceda67599b495ea371a14d55f8150f0..dcdd0d09783701d118865c13bd3f1cb7db2a95fb 100644 (file)
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -19,6 +19,8 @@
 #include <fdtdec.h>
 #include <linux/delay.h>
 
+#include <dt-bindings/clock/tegra30-car.h>
+
 /*
  * Clock types that we can use as a source. The Tegra30 has muxes for the
  * peripheral clocks, and in most cases there are four options for the clock
@@ -628,6 +630,41 @@ enum periph_id clk_id_to_periph_id(int clk_id)
                return clk_id;
        }
 }
+
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id       Clock ID according to tegra30 device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid
+ */
+enum clock_id clk_id_to_pll_id(int clk_id)
+{
+       switch (clk_id) {
+       case TEGRA30_CLK_PLL_C:
+               return CLOCK_ID_CGENERAL;
+       case TEGRA30_CLK_PLL_M:
+               return CLOCK_ID_MEMORY;
+       case TEGRA30_CLK_PLL_P:
+               return CLOCK_ID_PERIPH;
+       case TEGRA30_CLK_PLL_A:
+               return CLOCK_ID_AUDIO;
+       case TEGRA30_CLK_PLL_U:
+               return CLOCK_ID_USB;
+       case TEGRA30_CLK_PLL_D:
+       case TEGRA30_CLK_PLL_D_OUT0:
+               return CLOCK_ID_DISPLAY;
+       case TEGRA30_CLK_PLL_X:
+               return CLOCK_ID_XCPU;
+       case TEGRA30_CLK_PLL_E:
+               return CLOCK_ID_EPCI;
+       case TEGRA30_CLK_CLK_32K:
+               return CLOCK_ID_32KHZ;
+       case TEGRA30_CLK_CLK_M:
+               return CLOCK_ID_CLK_M;
+       default:
+               return CLOCK_ID_NONE;
+       }
+}
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 
 void clock_early_init(void)