ret = clk_get_by_index(bus, 0, &clk);
if (ret < 0) {
- dev_err(dev, "failed to get clock\n");
+ dev_err(bus, "failed to get clock\n");
return ret;
}
clock = clk_get_rate(&clk);
if (IS_ERR_VALUE(clock)) {
- dev_err(dev, "failed to get rate\n");
+ dev_err(bus, "failed to get rate\n");
return clock;
}
debug("%s: CLK %ld\n", __func__, clock);
ret = clk_enable(&clk);
if (ret && ret != -ENOSYS) {
- dev_err(dev, "failed to enable clock\n");
+ dev_err(bus, "failed to enable clock\n");
return ret;
}
plat->frequency = clock;