IPQ40xx: Add reset controller support

Since we have a driver for the reset controller, lets add the necessary node.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ee378f03f449cddc35ce0cc2c61d93adc8548bf0..68d6d1afd67a0f78b4a4a1ef2bc855e5516b1c2b 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -767,6 +767,7 @@ config ARCH_IPQ40XX
        select DM
        select DM_GPIO
        select DM_SERIAL
+       select DM_RESET
        select MSM_SMEM
        select PINCTRL
        select CLK

diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi
index dd69d0a5b283701042eddbc6aaae56db146bca08..7b15df38d8b683ff6b637c407a7687fd25a1f99a 100644 (file)
--- a/arch/arm/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/dts/qcom-ipq4019.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/pinctrl-snapdragon.h>
 #include <dt-bindings/clock/qcom,ipq4019-gcc.h>
+#include <dt-bindings/reset/qcom,ipq4019-reset.h>
 
 / {
        #address-cells = <1>;
@@ -58,6 +59,14 @@
                        u-boot,dm-pre-reloc;
                };
 
+               reset: gcc-reset@1800000 {
+                       compatible = "qcom,gcc-reset-ipq4019";
+                       reg = <0x1800000 0x60000>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       u-boot,dm-pre-reloc;
+               };
+
                pinctrl: qcom,tlmm@1000000 {
                        compatible = "qcom,tlmm-ipq4019";
                        reg = <0x1000000 0x300000>;