ARM: dts: imx7: imx7_colibri: introduce fec node

Sync DTS with the mainline Linux and introduce fec node and
regulator configuration for rn5t567 PMU.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>

diff --git a/arch/arm/dts/imx7-colibri.dtsi b/arch/arm/dts/imx7-colibri.dtsi
index 308e0b2a63fa06001d7885573373352943a0574d..ec95f22a0c38b31a172ed6bf81a4580e6f12f8c8 100644 (file)
--- a/arch/arm/dts/imx7-colibri.dtsi
+++ b/arch/arm/dts/imx7-colibri.dtsi
@@ -18,6 +18,70 @@
        rn5t567@33 {
                compatible = "ricoh,rn5t567";
                reg = <0x33>;
+
+               regulators {
+                       reg_DCDC1: DCDC1 {  /* V1.0_SOC */
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <1100000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_DCDC2: DCDC2 { /* V1.1_ARM */
+                               regulator-min-microvolt = <975000>;
+                               regulator-max-microvolt = <1100000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_DCDC3: DCDC3 { /* V1.8 */
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_DCDC4: DCDC4 { /* V1.35_DRAM */
+                               regulator-min-microvolt = <1350000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                       };
+
+                       reg_LDO2: LDO2 { /* +V1.8_SD */
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_LDO4: LDO4 { /* V1.8_LPSR */
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+               };
        };
 };
 
@@ -30,6 +94,25 @@
        status = "okay";
 };
 
+&fec1 {
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&pinctrl_enet1>;
+       pinctrl-1 = <&pinctrl_enet1_sleep>;
+       clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+               <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+               <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
+               <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>;
+       clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";
+       assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
+                         <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
+       assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
+       assigned-clock-rates = <0>, <100000000>;
+       phy-mode = "rmii";
+       phy-supply = <&reg_LDO1>;
+       fsl,magic-packet;
+       status = "okay";
+};
+
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
@@ -88,6 +171,39 @@
                        MX7D_PAD_SD1_DATA3__SD1_DATA3   0x59
                >;
        };
+
+       pinctrl_enet1: enet1grp {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_CRS__GPIO7_IO14                  0x14
+                       MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73
+                       MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0       0x73
+                       MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1       0x73
+                       MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER           0x73
+
+                       MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73
+                       MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0       0x73
+                       MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1       0x73
+                       MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1          0x73
+                       MX7D_PAD_SD2_CD_B__ENET1_MDIO                   0x3
+                       MX7D_PAD_SD2_WP__ENET1_MDC                      0x3
+               >;
+       };
+
+       pinctrl_enet1_sleep: enet1sleepgrp {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4          0x0
+                       MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0             0x0
+                       MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1             0x0
+                       MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5             0x0
+
+                       MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10         0x0
+                       MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6             0x0
+                       MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7             0x0
+                       MX7D_PAD_GPIO1_IO12__GPIO1_IO12                 0x0
+                       MX7D_PAD_SD2_CD_B__GPIO5_IO9                    0x0
+                       MX7D_PAD_SD2_WP__GPIO5_IO10                     0x0
+               >;
+       };
 };
 
 &iomuxc_lpsr {

diff --git a/arch/arm/dts/imx7d.dtsi b/arch/arm/dts/imx7d.dtsi
index 30b058934bf93a3dce00d2da705dc8215ee5c2ef..75566c780a4dba567daeee5a6cbda8d9ee03a9dd 100644 (file)
--- a/arch/arm/dts/imx7d.dtsi
+++ b/arch/arm/dts/imx7d.dtsi
@@ -44,6 +44,9 @@
 #include "imx7s.dtsi"
 
 / {
+       aliases {
+               ethernet1 = &fec2;
+       };
        cpus {
                cpu0: cpu@0 {
                        operating-points = <

diff --git a/arch/arm/dts/imx7s.dtsi b/arch/arm/dts/imx7s.dtsi
index 5067b9f7e7ccda2621b5c6e7474a80aefa8e13a9..5c2e98be063004e3537aca95ebce2921a35e4a90 100644 (file)
--- a/arch/arm/dts/imx7s.dtsi
+++ b/arch/arm/dts/imx7s.dtsi
@@ -87,6 +87,7 @@
                spi2 = &ecspi2;
                spi3 = &ecspi3;
                spi4 = &ecspi4;
+               ethernet0 = &fec1;
        };
 
        cpus {