T4/usb: move usb 2.0 utmi dual phy init code to cpu_init.c

This is what we have done for the UTMI PHY on P3041/P5020. Then the PHY
initialization can be reused in kernel without  “usb start” command.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 53713e31d42a05b85aadd021a7c5528957ca5e2a..48e6a05d38d1d5b37dfcf09b045b3a96834fd868 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -637,6 +637,28 @@ skip_l2:
        }
 #endif
 
+#if defined(CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE)
+               ccsr_usb_phy_t *usb_phy =
+                       (void *)CONFIG_SYS_MPC85xx_USB1_PHY_ADDR;
+               setbits_be32(&usb_phy->pllprg[1],
+                            CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN |
+                            CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN |
+                            CONFIG_SYS_FSL_USB_PLLPRG2_MFI |
+                            CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN);
+               setbits_be32(&usb_phy->port1.ctrl,
+                            CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
+               setbits_be32(&usb_phy->port1.drvvbuscfg,
+                            CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
+               setbits_be32(&usb_phy->port1.pwrfltcfg,
+                            CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
+               setbits_be32(&usb_phy->port2.ctrl,
+                            CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
+               setbits_be32(&usb_phy->port2.drvvbuscfg,
+                            CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
+               setbits_be32(&usb_phy->port2.pwrfltcfg,
+                            CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
+#endif
+
 #ifdef CONFIG_FMAN_ENET
        fman_enet_init();
 #endif

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 77c41f3c3e4e0c9ffed8bac7c3520470b418d956..f54b4089662d8cf472ff39f7f3d230987d630228 100644 (file)
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -89,27 +89,6 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 
        if (!strcmp(phy_type, "utmi")) {
 #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
-#if defined(CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE)
-               ccsr_usb_phy_t *usb_phy =
-                       (void *)CONFIG_SYS_MPC85xx_USB1_PHY_ADDR;
-               setbits_be32(&usb_phy->pllprg[1],
-                            CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN     |
-                            CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN     |
-                            CONFIG_SYS_FSL_USB_PLLPRG2_MFI             |
-                            CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN);
-               setbits_be32(&usb_phy->port1.ctrl,
-                            CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
-               setbits_be32(&usb_phy->port1.drvvbuscfg,
-                            CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
-               setbits_be32(&usb_phy->port1.pwrfltcfg,
-                            CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
-               setbits_be32(&usb_phy->port2.ctrl,
-                            CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
-               setbits_be32(&usb_phy->port2.drvvbuscfg,
-                            CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
-               setbits_be32(&usb_phy->port2.pwrfltcfg,
-                            CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
-#endif
                setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
                setbits_be32(&ehci->control, UTMI_PHY_EN);
                udelay(1000); /* delay required for PHY Clk to appear */